drm/i915/bxt: Add HW state verification for DDI PHY and CDCLK

I caught a few errors in our current PHY/CDCLK programming by sanity
checking the actual programmed state, so I thought it would be also
useful for the future. In addition to verifying the state after
programming it also verify it after exiting DC5, to make sure DMC
restored/kept intact everything related.

v2:
- Inlining __phy_reg_verify_state() doesn't make sense and also
  incorrect, so don't do it (PW/CI gcc)
v3:
- Rebase on latest -nightly

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: David Weinehall <david.weinehall@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459780030-15781-1-git-send-email-imre.deak@intel.com

1 files changed, 8 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index e3f70c53c57e..cb20606d7d57 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -799,6 +799,11 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
                                           struct i915_power_well *power_well)
 {
         gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
+
+        if (IS_BROXTON(dev_priv)) {
+                broxton_cdclk_verify_state(dev_priv);
+                broxton_ddi_phy_verify_state(dev_priv);
+        }
 }
 
 static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
@@ -2199,6 +2204,9 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv,
         broxton_init_cdclk(dev_priv);
         broxton_ddi_phy_init(dev_priv);
 
+        broxton_cdclk_verify_state(dev_priv);
+        broxton_ddi_phy_verify_state(dev_priv);
+
         if (resume && dev_priv->csr.dmc_payload)
                 intel_csr_load_program(dev_priv);
 }