drm/i915: ring irq cleanups

- gen6 put/get only need one argument
    rflags and gflags are always the same (see above explanation)
- remove a couple redundantly defined IRQs
- reordered some lines to make things go in descending order

Every ring has its own interrupts, enables, masks, and status bits that
are fed into the main interrupt enable/mask/status registers. At one
point in time it seemed like a good idea to make our functions support
the notion that each interrupt may have a different bit position in the
corresponding register (blitter parser error may be bit n in IMR, but
bit m in blitter IMR). It turned out though that the HW designers did us
a solid on Gen6+ and this unfortunate situation has been avoided. This
allows our interrupt code to be cleaned up a bit.

I jammed this into one commit because there should be no functional
change with this commit, and staging it into multiple commits was
unnecessarily artificial IMO.

CC: Chris Wilson <chris@chris-wilson.co.uk>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet:
- fixed up merged conflict with vlv changes.
- added GEN6 to GT blitter bit, we only use it on gen6+.
- added a comment to both ring irq bits and GT irq bits that on gen6+
  these alias.
- added comment that GT_BSD_USER_INTERRUPT is ilk-only.
- I've got confused a bit that we still use GT_USER_INTERRUPT on ivb
  for the render ring - but this goes back to ilk where we have only
  gt interrupt bits and so we be equally confusing if changed.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 12 insertions, 24 deletions

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 75081f146390..c7eea7fad16f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -788,7 +788,7 @@ ring_add_request(struct intel_ring_buffer *ring,
 }
 
 static bool
-gen6_ring_get_irq(struct intel_ring_buffer *ring, u32 gflag, u32 rflag)
+gen6_ring_get_irq(struct intel_ring_buffer *ring, u32 mask)
 {
         struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
@@ -803,9 +803,9 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring, u32 gflag, u32 rflag)
 
         spin_lock(&ring->irq_lock);
         if (ring->irq_refcount++ == 0) {
-                ring->irq_mask &= ~rflag;
+                ring->irq_mask &= ~mask;
                 I915_WRITE_IMR(ring, ring->irq_mask);
-                ironlake_enable_irq(dev_priv, gflag);
+                ironlake_enable_irq(dev_priv, mask);
         }
         spin_unlock(&ring->irq_lock);
 
@@ -813,16 +813,16 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring, u32 gflag, u32 rflag)
 }
 
 static void
-gen6_ring_put_irq(struct intel_ring_buffer *ring, u32 gflag, u32 rflag)
+gen6_ring_put_irq(struct intel_ring_buffer *ring, u32 mask)
 {
         struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
 
         spin_lock(&ring->irq_lock);
         if (--ring->irq_refcount == 0) {
-                ring->irq_mask |= rflag;
+                ring->irq_mask |= mask;
                 I915_WRITE_IMR(ring, ring->irq_mask);
-                ironlake_disable_irq(dev_priv, gflag);
+                ironlake_disable_irq(dev_priv, mask);
         }
         spin_unlock(&ring->irq_lock);
 
@@ -1376,33 +1376,25 @@ gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
 static bool
 gen6_render_ring_get_irq(struct intel_ring_buffer *ring)
 {
-        return gen6_ring_get_irq(ring,
-                                 GT_USER_INTERRUPT,
-                                 GEN6_RENDER_USER_INTERRUPT);
+        return gen6_ring_get_irq(ring, GT_USER_INTERRUPT);
 }
 
 static void
 gen6_render_ring_put_irq(struct intel_ring_buffer *ring)
 {
-        return gen6_ring_put_irq(ring,
-                                 GT_USER_INTERRUPT,
-                                 GEN6_RENDER_USER_INTERRUPT);
+        return gen6_ring_put_irq(ring, GT_USER_INTERRUPT);
 }
 
 static bool
 gen6_bsd_ring_get_irq(struct intel_ring_buffer *ring)
 {
-        return gen6_ring_get_irq(ring,
-                                 GT_GEN6_BSD_USER_INTERRUPT,
-                                 GEN6_BSD_USER_INTERRUPT);
+        return gen6_ring_get_irq(ring, GEN6_BSD_USER_INTERRUPT);
 }
 
 static void
 gen6_bsd_ring_put_irq(struct intel_ring_buffer *ring)
 {
-        return gen6_ring_put_irq(ring,
-                                 GT_GEN6_BSD_USER_INTERRUPT,
-                                 GEN6_BSD_USER_INTERRUPT);
+        return gen6_ring_put_irq(ring, GEN6_BSD_USER_INTERRUPT);
 }
 
 /* ring buffer for Video Codec for Gen6+ */
@@ -1431,17 +1423,13 @@ static const struct intel_ring_buffer gen6_bsd_ring = {
 static bool
 blt_ring_get_irq(struct intel_ring_buffer *ring)
 {
-        return gen6_ring_get_irq(ring,
-                                 GT_BLT_USER_INTERRUPT,
-                                 GEN6_BLITTER_USER_INTERRUPT);
+        return gen6_ring_get_irq(ring, GEN6_BLITTER_USER_INTERRUPT);
 }
 
 static void
 blt_ring_put_irq(struct intel_ring_buffer *ring)
 {
-        gen6_ring_put_irq(ring,
-                          GT_BLT_USER_INTERRUPT,
-                          GEN6_BLITTER_USER_INTERRUPT);
+        gen6_ring_put_irq(ring, GEN6_BLITTER_USER_INTERRUPT);
 }
 
 static int blt_ring_flush(struct intel_ring_buffer *ring,