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authorRodrigo Vivi <rodrigo.vivi@intel.com>2017-10-03 18:31:42 -0400
committerRodrigo Vivi <rodrigo.vivi@intel.com>2017-10-25 13:36:01 -0400
commit43037c86d10cea185f6518f797f6303a06e734f9 (patch)
tree1b31aaf9b54ed433e1f6c8f79d7ae96a29cdb4d3 /drivers/gpu/drm/i915/intel_ringbuffer.c
parent22a8a4fc93b14b5a8cfc785edbdc6f7bd98bffb6 (diff)
drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.
This is heavily based on a initial patch provided by Ville plus all changes provided later by Ander. As Geminilake, Cannonlake also supports 2 pixels per clock. Different from Geminilake we are not implementing the 99% Wa. But we can revisit that decision later if we find out any limitation on later CNL SKUs. v2: Rebase on top of commit 'd305e0614601 ("drm/i915: Track minimum acceptable cdclk instead of "minimum dotclock")' v3: When fixing HDMI on CNL I noticed that I missed to convert back the doubled pixel rate to cdclk. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171003223142.26264-1-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
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