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authorChris Wilson <chris@chris-wilson.co.uk>2017-02-27 08:59:11 -0500
committerChris Wilson <chris@chris-wilson.co.uk>2017-02-27 11:01:45 -0500
commit20fe17aa52dcafd3bdeb9e37281d027b0c1c5a15 (patch)
tree1f7ffffb437a3622b1a28faa0bb9d9a29221d8be /drivers/gpu/drm/i915/intel_ringbuffer.c
parent6067a27d1f0184596d51decbac1c1fdc4acb012f (diff)
drm/i915: Remove redundant TLB invalidate on switching contexts
We are required to reload the TLBs around context switches (MI_SET_CONTEXT specifically) and the recommendation is do that before the MI_SET_CONTEXT so that it is serialised with the switch and not forgotten: [DevSNB] If Flush TLB invalidation Mode is enabled it’s the driver’s responsibility to invalidate the TLBs at least once after the previous context switch after any GTT mappings changed (including new GTT entries). This can be done by a pipeline PIPE_CONTROL with TLB inv bit set immediately before MI_SET_CONTEXT. However, we already do an unconditional TLB invalidate before every batch so this condition is satifisfied. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170227135913.8056-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
0 files changed, 0 insertions, 0 deletions