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authorChris Wilson <chris@chris-wilson.co.uk>2017-10-27 05:43:11 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2017-10-27 07:09:29 -0400
commit11caf5517c2c9eebd435c60e9343a3784d74e9a1 (patch)
tree2528a96186675d35d2a3fdba9f5195beb18a44c0 /drivers/gpu/drm/i915/intel_ringbuffer.c
parente6ed2a1b99051bc04abcc2daed3972efada0b7a9 (diff)
drm/i915: Empty the ring before disabling
An interesting snippet from Sandybridge's prm: "Although a Ring Buffer can be enabled in the non-empty state, it must not be disabled unless it is empty. Attempting to disable a Ring Buffer in the non-empty state is UNDEFINED." Let's avoid the undefined behaviour as we disable the rings prior to reset and resume. v2: Tell HEAD to catch up to TAIL (empty ring) first, then reset both to 0 (supposedly while stopped). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171027094311.30380-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 05e01446b00b..47fadf8da84e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -480,10 +480,14 @@ static bool stop_ring(struct intel_engine_cs *engine)
480 } 480 }
481 } 481 }
482 482
483 I915_WRITE_CTL(engine, 0); 483 I915_WRITE_HEAD(engine, I915_READ_TAIL(engine));
484
484 I915_WRITE_HEAD(engine, 0); 485 I915_WRITE_HEAD(engine, 0);
485 I915_WRITE_TAIL(engine, 0); 486 I915_WRITE_TAIL(engine, 0);
486 487
488 /* The ring must be empty before it is disabled */
489 I915_WRITE_CTL(engine, 0);
490
487 return (I915_READ_HEAD(engine) & HEAD_ADDR) == 0; 491 return (I915_READ_HEAD(engine) & HEAD_ADDR) == 0;
488} 492}
489 493