diff options
author | Dave Airlie <airlied@redhat.com> | 2018-08-16 19:26:51 -0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2018-08-16 20:33:48 -0400 |
commit | 0258d7a5e261b3ce0d730f6f8f66f833058ce2b6 (patch) | |
tree | e7f369d5cffca2151284715f98501842694e18eb /drivers/gpu/drm/i915/intel_ringbuffer.c | |
parent | 637319c67849baceea6ba466e62b70f9e674d85b (diff) | |
parent | 4795ac626a2fe5ce99ff788080ace343faf4c886 (diff) |
Merge tag 'drm-intel-next-fixes-2018-08-16-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Fixes for:
- DP full color range.
- selftest for gem_object
- forcewake on suspend
- GPU reset
This also include accumulated fixes from GVT:
- Fix an error code in gvt_dma_map_page() (Dan)
- Fix off by one error in intel_vgpu_write_fence() (Dan)
- Fix potential Spectre v1 (Gustavo)
- Fix workload free in vgpu release (Henry)
- Fix cleanup sequence in intel_gvt_clean_device (Henry)
- dmabuf mutex init place fix (Henry)
- possible memory leak in intel_vgpu_ioctl() err path (Yi)
- return error on cmd access check failure (Yan)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180816190335.GA7765@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 33faad3197fe..6a8f27d0a742 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
@@ -387,8 +387,18 @@ static void intel_ring_setup_status_page(struct intel_engine_cs *engine) | |||
387 | mmio = RING_HWS_PGA(engine->mmio_base); | 387 | mmio = RING_HWS_PGA(engine->mmio_base); |
388 | } | 388 | } |
389 | 389 | ||
390 | if (INTEL_GEN(dev_priv) >= 6) | 390 | if (INTEL_GEN(dev_priv) >= 6) { |
391 | I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff); | 391 | u32 mask = ~0u; |
392 | |||
393 | /* | ||
394 | * Keep the render interrupt unmasked as this papers over | ||
395 | * lost interrupts following a reset. | ||
396 | */ | ||
397 | if (engine->id == RCS) | ||
398 | mask &= ~BIT(0); | ||
399 | |||
400 | I915_WRITE(RING_HWSTAM(engine->mmio_base), mask); | ||
401 | } | ||
392 | 402 | ||
393 | I915_WRITE(mmio, engine->status_page.ggtt_offset); | 403 | I915_WRITE(mmio, engine->status_page.ggtt_offset); |
394 | POSTING_READ(mmio); | 404 | POSTING_READ(mmio); |