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authorRodrigo Vivi <rodrigo.vivi@intel.com>2016-02-12 07:08:11 -0500
committerRodrigo Vivi <rodrigo.vivi@intel.com>2016-02-17 16:04:04 -0500
commitd94d6e87138588b86f85d12f4174a4d0c55373f9 (patch)
treecf1bcd2705a6279704dbc8c433266d95bb9eb69f /drivers/gpu/drm/i915/intel_psr.c
parent69603dbb315fc7a2b855990ee308b97dc23bf6eb (diff)
drm/i915: Change i915.enable_psr parameter to use per platform default.
This will give us flexibility to enable PSR by default independently so issues and corner cases in one platform won't affect others were we have it working properly. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_psr.c')
-rw-r--r--drivers/gpu/drm/i915/intel_psr.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 4ab757947f15..655bdf62bf83 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -778,6 +778,11 @@ void intel_psr_init(struct drm_device *dev)
778 dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ? 778 dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ?
779 HSW_EDP_PSR_BASE : BDW_EDP_PSR_BASE; 779 HSW_EDP_PSR_BASE : BDW_EDP_PSR_BASE;
780 780
781 /* Per platform default */
782 if (i915.enable_psr == -1) {
783 i915.enable_psr = 0;
784 }
785
781 /* Set link_standby x link_off defaults */ 786 /* Set link_standby x link_off defaults */
782 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) 787 if (IS_HASWELL(dev) || IS_BROADWELL(dev))
783 /* HSW and BDW require workarounds that we don't implement. */ 788 /* HSW and BDW require workarounds that we don't implement. */