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authorDave Airlie <airlied@redhat.com>2018-09-27 19:37:51 -0400
committerDave Airlie <airlied@redhat.com>2018-09-27 19:37:55 -0400
commitdb9825c95498280718c4687fcf712016f5b6f5f6 (patch)
tree01661a811bcd16a7b6f3ee9790e77da75fd178b0 /drivers/gpu/drm/i915/intel_pm.c
parent156e60bc71aa31a3b42b1d66a822c2999bd0994c (diff)
parent448626103dad54ec5d06722e955586b5d557625d (diff)
Merge tag 'drm-intel-next-2018-09-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Driver Changes: - Bugzilla 107600: Fix stuttering video playback on MythTV on old hardware (Chris) - Avoid black screen when using CSC coefficient matrix (Raviraj) - Hammer PDs on Baytrail to make sure they reload (Chris) - Capture some objects if unable to capture all, on error (Chris) - Add W/A for 16 GB DIMMs on SKL+ (Mahesh) - Only enable IPC for symmetric memory configurations on KBL+ (Mahesh) - Assume pipe A to have maximum stride limits (Ville) - Always update update OA contexts via context image (Tvrtko) - Icelake enabling patches (Madhav, Dhinakaran) - Add Icelake DMC firmware (Anusha) - Fixes for CI found corner cases (Chris) - Limit the backpressure for request allocation (Chris) - Park GPU on module load so usage starts from known state (Chris) - Flush tasklet when checking for idle (Chris) - Use coherent write into the context image on BSW+ (Chris) - Fix possible integer overflow for framebuffers that get aligned past 4GiB (Ville) - Downgrade fence timeout from warn to notice and add debug hint (Chris) - Fixes to multi function encoder code (Ville) - Fix sprite plane check logic (Dan, Ville) - PAGE_SIZE vs. I915_GTT_PAGE_SIZE fixes (Ville) - Decode memory bandwidth and parameters for BXT and SKL+ (Mahesh) - Overwrite BIOS set IPC value from KMS (Mahesh) - Multiple pipe handling code cleanups/restructurings/optimizations (Ville) - Spare low 4G address for non-48bit objects (Chris) - Free context_setparam of struct_mutex (Chris) - Delay updating ring register state on resume (Chris) - Avoid unnecessarily copying overlay IOCTL parameters (Chris) - Update GuC power domain states even without submission (Michal) - Restore GuC preempt-context across S3/S4 (Chris) - Add kernel selftest for rapid context switching (Chris) - Keep runtime power management ref for live selftests (Chris) - GEM code cleanups (Matt) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180927095933.GA11458@jlahtine-desk.ger.corp.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d99e5fabe93c..1db9b8328275 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2875,6 +2875,16 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv,
2875 } 2875 }
2876 } 2876 }
2877 2877
2878 /*
2879 * WA Level-0 adjustment for 16GB DIMMs: SKL+
2880 * If we could not get dimm info enable this WA to prevent from
2881 * any underrun. If not able to get Dimm info assume 16GB dimm
2882 * to avoid any underrun.
2883 */
2884 if (!dev_priv->dram_info.valid_dimm ||
2885 dev_priv->dram_info.is_16gb_dimm)
2886 wm[0] += 1;
2887
2878 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { 2888 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
2879 uint64_t sskpd = I915_READ64(MCH_SSKPD); 2889 uint64_t sskpd = I915_READ64(MCH_SSKPD);
2880 2890
@@ -6108,10 +6118,13 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
6108 u32 val; 6118 u32 val;
6109 6119
6110 /* Display WA #0477 WaDisableIPC: skl */ 6120 /* Display WA #0477 WaDisableIPC: skl */
6111 if (IS_SKYLAKE(dev_priv)) { 6121 if (IS_SKYLAKE(dev_priv))
6122 dev_priv->ipc_enabled = false;
6123
6124 /* Display WA #1141: SKL:all KBL:all CFL */
6125 if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) &&
6126 !dev_priv->dram_info.symmetric_memory)
6112 dev_priv->ipc_enabled = false; 6127 dev_priv->ipc_enabled = false;
6113 return;
6114 }
6115 6128
6116 val = I915_READ(DISP_ARB_CTL2); 6129 val = I915_READ(DISP_ARB_CTL2);
6117 6130