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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2017-10-19 11:13:41 -0400
committerJani Nikula <jani.nikula@intel.com>2017-11-09 09:18:21 -0500
commit90c702b88e5b5bbe2be53848aa3aba7c2b64223f (patch)
tree26169424269369eeb04472052b61aed01fff8e12 /drivers/gpu/drm/i915/intel_pm.c
parentb58d4bef1070c6ca57008756d86f79a687d2bbea (diff)
drm/i915: Calculate ironlake intermediate watermarks correctly, v2.
The watermarks it should calculate against are the old optimal watermarks. The currently active crtc watermarks are pure fiction, and are invalid in case of a nonblocking modeset, page flip enabling/disabling planes or any other reason. When the crtc is disabled or during a modeset the intermediate watermarks don't need to be programmed separately, and could be directly assigned to the optimal watermarks. Changes since v1: - Use intel_atomic_get_old_crtc_state. (ville) Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171019151341.4579-2-maarten.lankhorst@linux.intel.com [mlankhorst: Add cc stable and bugzilla link, since previous patch doesn't fix issue by itself] Cc: stable@vger.kernel.org #v4.8+ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102373 (cherry picked from commit b6b178a77210055b153dbc175e4468bd3c7122df) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c42a65a93b3a..7d2ecabc5de5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3133,7 +3133,11 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
3133 struct intel_crtc_state *newstate) 3133 struct intel_crtc_state *newstate)
3134{ 3134{
3135 struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate; 3135 struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate;
3136 struct intel_pipe_wm *b = &intel_crtc->wm.active.ilk; 3136 struct intel_atomic_state *intel_state =
3137 to_intel_atomic_state(newstate->base.state);
3138 const struct intel_crtc_state *oldstate =
3139 intel_atomic_get_old_crtc_state(intel_state, intel_crtc);
3140 const struct intel_pipe_wm *b = &oldstate->wm.ilk.optimal;
3137 int level, max_level = ilk_wm_max_level(to_i915(dev)); 3141 int level, max_level = ilk_wm_max_level(to_i915(dev));
3138 3142
3139 /* 3143 /*
@@ -3142,6 +3146,9 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
3142 * and after the vblank. 3146 * and after the vblank.
3143 */ 3147 */
3144 *a = newstate->wm.ilk.optimal; 3148 *a = newstate->wm.ilk.optimal;
3149 if (!newstate->base.active || drm_atomic_crtc_needs_modeset(&newstate->base))
3150 return 0;
3151
3145 a->pipe_enabled |= b->pipe_enabled; 3152 a->pipe_enabled |= b->pipe_enabled;
3146 a->sprites_enabled |= b->sprites_enabled; 3153 a->sprites_enabled |= b->sprites_enabled;
3147 a->sprites_scaled |= b->sprites_scaled; 3154 a->sprites_scaled |= b->sprites_scaled;