drm/i915/chv: Extend set idle rps wa to chv

It is observed on BSW that requesting a new frequency from Punit
does nothing when the GPU is in rc6, and if we let GPU enter rc6
with a high frequency, Vnn remains slightly higher than at minimum
frequency. Extending vlv_set_rps_idle() workaround on CHV/BSW.

v2: Update commit msg (Ville)

suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 0 insertions, 7 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d22bba98d83f..2b016f2e3465 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4106,15 +4106,8 @@ static void valleyview_set_rps(struct drm_device *dev, u8 val)
 */
 static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
 {
-        struct drm_device *dev = dev_priv->dev;
         u32 val = dev_priv->rps.idle_freq;
 
-        /* CHV don't need to force the gfx clock */
-        if (IS_CHERRYVIEW(dev)) {
-                valleyview_set_rps(dev_priv->dev, val);
-                return;
-        }
-
         if (dev_priv->rps.cur_freq <= val)
                 return;