drm/i915: Setup static bias for GPU

Based on the spec, Setting up static BIAS for GPU to improve the
rps performace.

v2: rename reg defn to match spec. (Ville)

v3: Updated bias setting for chv (Deepak)

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 12 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a7516ed24eee..8812fffeac5e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5082,6 +5082,12 @@ static void cherryview_enable_rps(struct drm_device *dev)
                    GEN6_RP_UP_BUSY_AVG |
                    GEN6_RP_DOWN_IDLE_AVG);
 
+        /* Setting Fixed Bias */
+        val = VLV_OVERRIDE_EN |
+                  VLV_SOC_TDP_EN |
+                  CHV_BIAS_CPU_50_SOC_50;
+        vlv_punit_write(dev_priv, VLV_TURBO_SOC_OVERRIDE, val);
+
         val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
 
         /* RPS code assumes GPLL is used */
@@ -5166,6 +5172,12 @@ static void valleyview_enable_rps(struct drm_device *dev)
 
         I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
 
+        /* Setting Fixed Bias */
+        val = VLV_OVERRIDE_EN |
+                  VLV_SOC_TDP_EN |
+                  VLV_BIAS_CPU_125_SOC_875;
+        vlv_punit_write(dev_priv, VLV_TURBO_SOC_OVERRIDE, val);
+
         val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
 
         /* RPS code assumes GPLL is used */