drm/i915/bxt: add GEN8_SDEUNIT_CLOCK_GATE_DISABLE workaround

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 11 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 767a3e2ffdd1..a3247e83b072 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -96,7 +96,18 @@ static void skl_init_clock_gating(struct drm_device *dev)
 
 static void bxt_init_clock_gating(struct drm_device *dev)
 {
+        struct drm_i915_private *dev_priv = dev->dev_private;
+
         gen9_init_clock_gating(dev);
+
+        /*
+         * FIXME:
+         * GEN8_SDEUNIT_CLOCK_GATE_DISABLE applies on A0 only.
+         */
+         /* WaDisableSDEUnitClockGating:bxt */
+        I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
+                   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
+
 }
 
 static void i915_pineview_get_mem_freq(struct drm_device *dev)