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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-19 04:47:30 -0400 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-19 04:47:30 -0400 |
| commit | 0d4a42f6bd298e826620585e766a154ab460617a (patch) | |
| tree | 406d8f7778691d858dbe3e48e4bbb10e99c0a58a /drivers/gpu/drm/i915/intel_pm.c | |
| parent | d62b4892f3d9f7dd2002e5309be10719d6805b0f (diff) | |
| parent | a937536b868b8369b98967929045f1df54234323 (diff) | |
Merge tag 'v3.9-rc3' into drm-intel-next-queued
Backmerge so that I can merge Imre Deak's coalesced sg entries fixes,
which depend upon the new for_each_sg_page introduce in
commit a321e91b6d73ed011ffceed384c40d2785cf723b
Author: Imre Deak <imre.deak@intel.com>
Date: Wed Feb 27 17:02:56 2013 -0800
lib/scatterlist: add simple page iterator
The merge itself is just two trivial conflicts:
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 44a23b9b8e53..c30e89a45236 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
| @@ -2574,7 +2574,7 @@ static void gen6_enable_rps(struct drm_device *dev) | |||
| 2574 | I915_WRITE(GEN6_RC_SLEEP, 0); | 2574 | I915_WRITE(GEN6_RC_SLEEP, 0); |
| 2575 | I915_WRITE(GEN6_RC1e_THRESHOLD, 1000); | 2575 | I915_WRITE(GEN6_RC1e_THRESHOLD, 1000); |
| 2576 | I915_WRITE(GEN6_RC6_THRESHOLD, 50000); | 2576 | I915_WRITE(GEN6_RC6_THRESHOLD, 50000); |
| 2577 | I915_WRITE(GEN6_RC6p_THRESHOLD, 100000); | 2577 | I915_WRITE(GEN6_RC6p_THRESHOLD, 150000); |
| 2578 | I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */ | 2578 | I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */ |
| 2579 | 2579 | ||
| 2580 | /* Check if we are enabling RC6 */ | 2580 | /* Check if we are enabling RC6 */ |