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authorDave Airlie <airlied@redhat.com>2016-06-01 17:58:36 -0400
committerDave Airlie <airlied@redhat.com>2016-06-01 17:58:36 -0400
commit66fd7a66e8b9e11e49f46ea77910f935c4dee5c3 (patch)
treecc9dd78568036c1d4d0313bcd74f017b69a106c4 /drivers/gpu/drm/i915/intel_overlay.c
parent65439b68bb10afd877af05463bbff5d25200fd06 (diff)
parente42aeef1237b7c969a77b7f726c50f6cb832185f (diff)
Merge branch 'drm-intel-next' of git://anongit.freedesktop.org/drm-intel into drm-next
drm-intel-next-2016-05-22: - cmd-parser support for direct reg->reg loads (Ken Graunke) - better handle DP++ smart dongles (Ville) - bxt guc fw loading support (Nick Hoathe) - remove a bunch of struct typedefs from dpll code (Ander) - tons of small work all over to avoid casting between drm_device and the i915 dev struct (Tvrtko&Chris) - untangle request retiring from other operations, also fixes reset stat corner cases (Chris) - skl atomic watermark support from Matt Roper, yay! - various wm handling bugfixes from Ville - big pile of cdclck rework for bxt/skl (Ville) - CABC (Content Adaptive Brigthness Control) for dsi panels (Jani&Deepak M) - nonblocking atomic commits for plane-only updates (Maarten Lankhorst) - bunch of PSR fixes&improvements - untangle our map/pin/sg_iter code a bit (Dave Gordon) drm-intel-next-2016-05-08: - refactor stolen quirks to share code between early quirks and i915 (Joonas) - refactor gem BO/vma funcstion (Tvrtko&Dave) - backlight over DPCD support (Yetunde Abedisi) - more dsi panel sequence support (Jani) - lots of refactoring around handling iomaps, vma, ring access and related topics culmulating in removing the duplicated request tracking in the execlist code (Chris & Tvrtko) includes a small patch for core iomapping code - hw state readout for bxt dsi (Ramalingam C) - cdclk cleanups (Ville) - dedupe chv pll code a bit (Ander) - enable semaphores on gen8+ for legacy submission, to be able to have a direct comparison against execlist on the same platform (Chris) Not meant to be used for anything else but performance tuning - lvds border bit hw state checker fix (Jani) - rpm vs. shrinker/oom-notifier fixes (Praveen Paneri) - l3 tuning (Imre) - revert mst dp audio, it's totally non-functional and crash-y (Lyude) - first official dmc for kbl (Rodrigo) - and tons of small things all over as usual * 'drm-intel-next' of git://anongit.freedesktop.org/drm-intel: (194 commits) drm/i915: Revert async unpin and nonblocking atomic commit drm/i915: Update DRIVER_DATE to 20160522 drm/i915: Inline sg_next() for the optimised SGL iterator drm/i915: Introduce & use new lightweight SGL iterators drm/i915: optimise i915_gem_object_map() for small objects drm/i915: refactor i915_gem_object_pin_map() drm/i915/psr: Implement PSR2 w/a for gen9 drm/i915/psr: Use ->get_aux_send_ctl functions drm/i915/psr: Order DP aux transactions correctly drm/i915/psr: Make idle_frames sensible again drm/i915/psr: Try to program link training times correctly drm/i915/userptr: Convert to drm_i915_private drm/i915: Allow nonblocking update of pageflips. drm/i915: Check for unpin correctness. Reapply "drm/i915: Avoid stalling on pending flips for legacy cursor updates" drm/i915: Make unpin async. drm/i915: Prepare connectors for nonblocking checks. drm/i915: Pass atomic states to fbc update functions. drm/i915: Remove reset_counter from intel_crtc. drm/i915: Remove queue_flip pointer. ...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_overlay.c')
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c147
1 files changed, 66 insertions, 81 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index bd38e49f7334..eb93f90bb74d 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -168,7 +168,7 @@ struct overlay_registers {
168}; 168};
169 169
170struct intel_overlay { 170struct intel_overlay {
171 struct drm_device *dev; 171 struct drm_i915_private *i915;
172 struct intel_crtc *crtc; 172 struct intel_crtc *crtc;
173 struct drm_i915_gem_object *vid_bo; 173 struct drm_i915_gem_object *vid_bo;
174 struct drm_i915_gem_object *old_vid_bo; 174 struct drm_i915_gem_object *old_vid_bo;
@@ -190,15 +190,15 @@ struct intel_overlay {
190static struct overlay_registers __iomem * 190static struct overlay_registers __iomem *
191intel_overlay_map_regs(struct intel_overlay *overlay) 191intel_overlay_map_regs(struct intel_overlay *overlay)
192{ 192{
193 struct drm_i915_private *dev_priv = to_i915(overlay->dev); 193 struct drm_i915_private *dev_priv = overlay->i915;
194 struct i915_ggtt *ggtt = &dev_priv->ggtt;
195 struct overlay_registers __iomem *regs; 194 struct overlay_registers __iomem *regs;
196 195
197 if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) 196 if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
198 regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr; 197 regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr;
199 else 198 else
200 regs = io_mapping_map_wc(ggtt->mappable, 199 regs = io_mapping_map_wc(dev_priv->ggtt.mappable,
201 i915_gem_obj_ggtt_offset(overlay->reg_bo)); 200 overlay->flip_addr,
201 PAGE_SIZE);
202 202
203 return regs; 203 return regs;
204} 204}
@@ -206,7 +206,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
206static void intel_overlay_unmap_regs(struct intel_overlay *overlay, 206static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
207 struct overlay_registers __iomem *regs) 207 struct overlay_registers __iomem *regs)
208{ 208{
209 if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev)) 209 if (!OVERLAY_NEEDS_PHYSICAL(overlay->i915))
210 io_mapping_unmap(regs); 210 io_mapping_unmap(regs);
211} 211}
212 212
@@ -232,14 +232,13 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
232/* overlay needs to be disable in OCMD reg */ 232/* overlay needs to be disable in OCMD reg */
233static int intel_overlay_on(struct intel_overlay *overlay) 233static int intel_overlay_on(struct intel_overlay *overlay)
234{ 234{
235 struct drm_device *dev = overlay->dev; 235 struct drm_i915_private *dev_priv = overlay->i915;
236 struct drm_i915_private *dev_priv = dev->dev_private;
237 struct intel_engine_cs *engine = &dev_priv->engine[RCS]; 236 struct intel_engine_cs *engine = &dev_priv->engine[RCS];
238 struct drm_i915_gem_request *req; 237 struct drm_i915_gem_request *req;
239 int ret; 238 int ret;
240 239
241 WARN_ON(overlay->active); 240 WARN_ON(overlay->active);
242 WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE)); 241 WARN_ON(IS_I830(dev_priv) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
243 242
244 req = i915_gem_request_alloc(engine, NULL); 243 req = i915_gem_request_alloc(engine, NULL);
245 if (IS_ERR(req)) 244 if (IS_ERR(req))
@@ -266,8 +265,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
266static int intel_overlay_continue(struct intel_overlay *overlay, 265static int intel_overlay_continue(struct intel_overlay *overlay,
267 bool load_polyphase_filter) 266 bool load_polyphase_filter)
268{ 267{
269 struct drm_device *dev = overlay->dev; 268 struct drm_i915_private *dev_priv = overlay->i915;
270 struct drm_i915_private *dev_priv = dev->dev_private;
271 struct intel_engine_cs *engine = &dev_priv->engine[RCS]; 269 struct intel_engine_cs *engine = &dev_priv->engine[RCS];
272 struct drm_i915_gem_request *req; 270 struct drm_i915_gem_request *req;
273 u32 flip_addr = overlay->flip_addr; 271 u32 flip_addr = overlay->flip_addr;
@@ -335,8 +333,7 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
335/* overlay needs to be disabled in OCMD reg */ 333/* overlay needs to be disabled in OCMD reg */
336static int intel_overlay_off(struct intel_overlay *overlay) 334static int intel_overlay_off(struct intel_overlay *overlay)
337{ 335{
338 struct drm_device *dev = overlay->dev; 336 struct drm_i915_private *dev_priv = overlay->i915;
339 struct drm_i915_private *dev_priv = dev->dev_private;
340 struct intel_engine_cs *engine = &dev_priv->engine[RCS]; 337 struct intel_engine_cs *engine = &dev_priv->engine[RCS];
341 struct drm_i915_gem_request *req; 338 struct drm_i915_gem_request *req;
342 u32 flip_addr = overlay->flip_addr; 339 u32 flip_addr = overlay->flip_addr;
@@ -365,7 +362,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
365 intel_ring_emit(engine, flip_addr); 362 intel_ring_emit(engine, flip_addr);
366 intel_ring_emit(engine, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); 363 intel_ring_emit(engine, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
367 /* turn overlay off */ 364 /* turn overlay off */
368 if (IS_I830(dev)) { 365 if (IS_I830(dev_priv)) {
369 /* Workaround: Don't disable the overlay fully, since otherwise 366 /* Workaround: Don't disable the overlay fully, since otherwise
370 * it dies on the next OVERLAY_ON cmd. */ 367 * it dies on the next OVERLAY_ON cmd. */
371 intel_ring_emit(engine, MI_NOOP); 368 intel_ring_emit(engine, MI_NOOP);
@@ -408,12 +405,11 @@ static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
408 */ 405 */
409static int intel_overlay_release_old_vid(struct intel_overlay *overlay) 406static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
410{ 407{
411 struct drm_device *dev = overlay->dev; 408 struct drm_i915_private *dev_priv = overlay->i915;
412 struct drm_i915_private *dev_priv = dev->dev_private;
413 struct intel_engine_cs *engine = &dev_priv->engine[RCS]; 409 struct intel_engine_cs *engine = &dev_priv->engine[RCS];
414 int ret; 410 int ret;
415 411
416 WARN_ON(!mutex_is_locked(&dev->struct_mutex)); 412 lockdep_assert_held(&dev_priv->dev->struct_mutex);
417 413
418 /* Only wait if there is actually an old frame to release to 414 /* Only wait if there is actually an old frame to release to
419 * guarantee forward progress. 415 * guarantee forward progress.
@@ -537,10 +533,10 @@ static int uv_vsubsampling(u32 format)
537 } 533 }
538} 534}
539 535
540static u32 calc_swidthsw(struct drm_device *dev, u32 offset, u32 width) 536static u32 calc_swidthsw(struct drm_i915_private *dev_priv, u32 offset, u32 width)
541{ 537{
542 u32 mask, shift, ret; 538 u32 mask, shift, ret;
543 if (IS_GEN2(dev)) { 539 if (IS_GEN2(dev_priv)) {
544 mask = 0x1f; 540 mask = 0x1f;
545 shift = 5; 541 shift = 5;
546 } else { 542 } else {
@@ -548,7 +544,7 @@ static u32 calc_swidthsw(struct drm_device *dev, u32 offset, u32 width)
548 shift = 6; 544 shift = 6;
549 } 545 }
550 ret = ((offset + width + mask) >> shift) - (offset >> shift); 546 ret = ((offset + width + mask) >> shift) - (offset >> shift);
551 if (!IS_GEN2(dev)) 547 if (!IS_GEN2(dev_priv))
552 ret <<= 1; 548 ret <<= 1;
553 ret -= 1; 549 ret -= 1;
554 return ret << 2; 550 return ret << 2;
@@ -741,12 +737,12 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
741 int ret, tmp_width; 737 int ret, tmp_width;
742 struct overlay_registers __iomem *regs; 738 struct overlay_registers __iomem *regs;
743 bool scale_changed = false; 739 bool scale_changed = false;
744 struct drm_device *dev = overlay->dev; 740 struct drm_i915_private *dev_priv = overlay->i915;
745 u32 swidth, swidthsw, sheight, ostride; 741 u32 swidth, swidthsw, sheight, ostride;
746 enum pipe pipe = overlay->crtc->pipe; 742 enum pipe pipe = overlay->crtc->pipe;
747 743
748 WARN_ON(!mutex_is_locked(&dev->struct_mutex)); 744 lockdep_assert_held(&dev_priv->dev->struct_mutex);
749 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); 745 WARN_ON(!drm_modeset_is_locked(&dev_priv->dev->mode_config.connection_mutex));
750 746
751 ret = intel_overlay_release_old_vid(overlay); 747 ret = intel_overlay_release_old_vid(overlay);
752 if (ret != 0) 748 if (ret != 0)
@@ -769,7 +765,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
769 goto out_unpin; 765 goto out_unpin;
770 } 766 }
771 oconfig = OCONF_CC_OUT_8BIT; 767 oconfig = OCONF_CC_OUT_8BIT;
772 if (IS_GEN4(overlay->dev)) 768 if (IS_GEN4(dev_priv))
773 oconfig |= OCONF_CSC_MODE_BT709; 769 oconfig |= OCONF_CSC_MODE_BT709;
774 oconfig |= pipe == 0 ? 770 oconfig |= pipe == 0 ?
775 OCONF_PIPE_A : OCONF_PIPE_B; 771 OCONF_PIPE_A : OCONF_PIPE_B;
@@ -796,7 +792,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
796 tmp_width = params->src_w; 792 tmp_width = params->src_w;
797 793
798 swidth = params->src_w; 794 swidth = params->src_w;
799 swidthsw = calc_swidthsw(overlay->dev, params->offset_Y, tmp_width); 795 swidthsw = calc_swidthsw(dev_priv, params->offset_Y, tmp_width);
800 sheight = params->src_h; 796 sheight = params->src_h;
801 iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_Y, &regs->OBUF_0Y); 797 iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_Y, &regs->OBUF_0Y);
802 ostride = params->stride_Y; 798 ostride = params->stride_Y;
@@ -806,9 +802,9 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
806 int uv_vscale = uv_vsubsampling(params->format); 802 int uv_vscale = uv_vsubsampling(params->format);
807 u32 tmp_U, tmp_V; 803 u32 tmp_U, tmp_V;
808 swidth |= (params->src_w/uv_hscale) << 16; 804 swidth |= (params->src_w/uv_hscale) << 16;
809 tmp_U = calc_swidthsw(overlay->dev, params->offset_U, 805 tmp_U = calc_swidthsw(dev_priv, params->offset_U,
810 params->src_w/uv_hscale); 806 params->src_w/uv_hscale);
811 tmp_V = calc_swidthsw(overlay->dev, params->offset_V, 807 tmp_V = calc_swidthsw(dev_priv, params->offset_V,
812 params->src_w/uv_hscale); 808 params->src_w/uv_hscale);
813 swidthsw |= max_t(u32, tmp_U, tmp_V) << 16; 809 swidthsw |= max_t(u32, tmp_U, tmp_V) << 16;
814 sheight |= (params->src_h/uv_vscale) << 16; 810 sheight |= (params->src_h/uv_vscale) << 16;
@@ -840,8 +836,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
840 overlay->old_vid_bo = overlay->vid_bo; 836 overlay->old_vid_bo = overlay->vid_bo;
841 overlay->vid_bo = new_bo; 837 overlay->vid_bo = new_bo;
842 838
843 intel_frontbuffer_flip(dev, 839 intel_frontbuffer_flip(dev_priv->dev, INTEL_FRONTBUFFER_OVERLAY(pipe));
844 INTEL_FRONTBUFFER_OVERLAY(pipe));
845 840
846 return 0; 841 return 0;
847 842
@@ -852,12 +847,12 @@ out_unpin:
852 847
853int intel_overlay_switch_off(struct intel_overlay *overlay) 848int intel_overlay_switch_off(struct intel_overlay *overlay)
854{ 849{
850 struct drm_i915_private *dev_priv = overlay->i915;
855 struct overlay_registers __iomem *regs; 851 struct overlay_registers __iomem *regs;
856 struct drm_device *dev = overlay->dev;
857 int ret; 852 int ret;
858 853
859 WARN_ON(!mutex_is_locked(&dev->struct_mutex)); 854 lockdep_assert_held(&dev_priv->dev->struct_mutex);
860 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); 855 WARN_ON(!drm_modeset_is_locked(&dev_priv->dev->mode_config.connection_mutex));
861 856
862 ret = intel_overlay_recover_from_interrupt(overlay); 857 ret = intel_overlay_recover_from_interrupt(overlay);
863 if (ret != 0) 858 if (ret != 0)
@@ -897,15 +892,14 @@ static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
897 892
898static void update_pfit_vscale_ratio(struct intel_overlay *overlay) 893static void update_pfit_vscale_ratio(struct intel_overlay *overlay)
899{ 894{
900 struct drm_device *dev = overlay->dev; 895 struct drm_i915_private *dev_priv = overlay->i915;
901 struct drm_i915_private *dev_priv = dev->dev_private;
902 u32 pfit_control = I915_READ(PFIT_CONTROL); 896 u32 pfit_control = I915_READ(PFIT_CONTROL);
903 u32 ratio; 897 u32 ratio;
904 898
905 /* XXX: This is not the same logic as in the xorg driver, but more in 899 /* XXX: This is not the same logic as in the xorg driver, but more in
906 * line with the intel documentation for the i965 900 * line with the intel documentation for the i965
907 */ 901 */
908 if (INTEL_INFO(dev)->gen >= 4) { 902 if (INTEL_GEN(dev_priv) >= 4) {
909 /* on i965 use the PGM reg to read out the autoscaler values */ 903 /* on i965 use the PGM reg to read out the autoscaler values */
910 ratio = I915_READ(PFIT_PGM_RATIOS) >> PFIT_VERT_SCALE_SHIFT_965; 904 ratio = I915_READ(PFIT_PGM_RATIOS) >> PFIT_VERT_SCALE_SHIFT_965;
911 } else { 905 } else {
@@ -948,7 +942,7 @@ static int check_overlay_scaling(struct put_image_params *rec)
948 return 0; 942 return 0;
949} 943}
950 944
951static int check_overlay_src(struct drm_device *dev, 945static int check_overlay_src(struct drm_i915_private *dev_priv,
952 struct drm_intel_overlay_put_image *rec, 946 struct drm_intel_overlay_put_image *rec,
953 struct drm_i915_gem_object *new_bo) 947 struct drm_i915_gem_object *new_bo)
954{ 948{
@@ -959,7 +953,7 @@ static int check_overlay_src(struct drm_device *dev,
959 u32 tmp; 953 u32 tmp;
960 954
961 /* check src dimensions */ 955 /* check src dimensions */
962 if (IS_845G(dev) || IS_I830(dev)) { 956 if (IS_845G(dev_priv) || IS_I830(dev_priv)) {
963 if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY || 957 if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY ||
964 rec->src_width > IMAGE_MAX_WIDTH_LEGACY) 958 rec->src_width > IMAGE_MAX_WIDTH_LEGACY)
965 return -EINVAL; 959 return -EINVAL;
@@ -1011,14 +1005,14 @@ static int check_overlay_src(struct drm_device *dev,
1011 return -EINVAL; 1005 return -EINVAL;
1012 1006
1013 /* stride checking */ 1007 /* stride checking */
1014 if (IS_I830(dev) || IS_845G(dev)) 1008 if (IS_I830(dev_priv) || IS_845G(dev_priv))
1015 stride_mask = 255; 1009 stride_mask = 255;
1016 else 1010 else
1017 stride_mask = 63; 1011 stride_mask = 63;
1018 1012
1019 if (rec->stride_Y & stride_mask || rec->stride_UV & stride_mask) 1013 if (rec->stride_Y & stride_mask || rec->stride_UV & stride_mask)
1020 return -EINVAL; 1014 return -EINVAL;
1021 if (IS_GEN4(dev) && rec->stride_Y < 512) 1015 if (IS_GEN4(dev_priv) && rec->stride_Y < 512)
1022 return -EINVAL; 1016 return -EINVAL;
1023 1017
1024 tmp = (rec->flags & I915_OVERLAY_TYPE_MASK) == I915_OVERLAY_YUV_PLANAR ? 1018 tmp = (rec->flags & I915_OVERLAY_TYPE_MASK) == I915_OVERLAY_YUV_PLANAR ?
@@ -1063,13 +1057,13 @@ static int check_overlay_src(struct drm_device *dev,
1063 * Return the pipe currently connected to the panel fitter, 1057 * Return the pipe currently connected to the panel fitter,
1064 * or -1 if the panel fitter is not present or not in use 1058 * or -1 if the panel fitter is not present or not in use
1065 */ 1059 */
1066static int intel_panel_fitter_pipe(struct drm_device *dev) 1060static int intel_panel_fitter_pipe(struct drm_i915_private *dev_priv)
1067{ 1061{
1068 struct drm_i915_private *dev_priv = dev->dev_private;
1069 u32 pfit_control; 1062 u32 pfit_control;
1070 1063
1071 /* i830 doesn't have a panel fitter */ 1064 /* i830 doesn't have a panel fitter */
1072 if (INTEL_INFO(dev)->gen <= 3 && (IS_I830(dev) || !IS_MOBILE(dev))) 1065 if (INTEL_GEN(dev_priv) <= 3 &&
1066 (IS_I830(dev_priv) || !IS_MOBILE(dev_priv)))
1073 return -1; 1067 return -1;
1074 1068
1075 pfit_control = I915_READ(PFIT_CONTROL); 1069 pfit_control = I915_READ(PFIT_CONTROL);
@@ -1079,15 +1073,15 @@ static int intel_panel_fitter_pipe(struct drm_device *dev)
1079 return -1; 1073 return -1;
1080 1074
1081 /* 965 can place panel fitter on either pipe */ 1075 /* 965 can place panel fitter on either pipe */
1082 if (IS_GEN4(dev)) 1076 if (IS_GEN4(dev_priv))
1083 return (pfit_control >> 29) & 0x3; 1077 return (pfit_control >> 29) & 0x3;
1084 1078
1085 /* older chips can only use pipe 1 */ 1079 /* older chips can only use pipe 1 */
1086 return 1; 1080 return 1;
1087} 1081}
1088 1082
1089int intel_overlay_put_image(struct drm_device *dev, void *data, 1083int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
1090 struct drm_file *file_priv) 1084 struct drm_file *file_priv)
1091{ 1085{
1092 struct drm_intel_overlay_put_image *put_image_rec = data; 1086 struct drm_intel_overlay_put_image *put_image_rec = data;
1093 struct drm_i915_private *dev_priv = dev->dev_private; 1087 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1162,7 +1156,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
1162 1156
1163 /* line too wide, i.e. one-line-mode */ 1157 /* line too wide, i.e. one-line-mode */
1164 if (mode->hdisplay > 1024 && 1158 if (mode->hdisplay > 1024 &&
1165 intel_panel_fitter_pipe(dev) == crtc->pipe) { 1159 intel_panel_fitter_pipe(dev_priv) == crtc->pipe) {
1166 overlay->pfit_active = true; 1160 overlay->pfit_active = true;
1167 update_pfit_vscale_ratio(overlay); 1161 update_pfit_vscale_ratio(overlay);
1168 } else 1162 } else
@@ -1196,7 +1190,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
1196 goto out_unlock; 1190 goto out_unlock;
1197 } 1191 }
1198 1192
1199 ret = check_overlay_src(dev, put_image_rec, new_bo); 1193 ret = check_overlay_src(dev_priv, put_image_rec, new_bo);
1200 if (ret != 0) 1194 if (ret != 0)
1201 goto out_unlock; 1195 goto out_unlock;
1202 params->format = put_image_rec->flags & ~I915_OVERLAY_FLAGS_MASK; 1196 params->format = put_image_rec->flags & ~I915_OVERLAY_FLAGS_MASK;
@@ -1284,8 +1278,8 @@ static int check_gamma(struct drm_intel_overlay_attrs *attrs)
1284 return 0; 1278 return 0;
1285} 1279}
1286 1280
1287int intel_overlay_attrs(struct drm_device *dev, void *data, 1281int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
1288 struct drm_file *file_priv) 1282 struct drm_file *file_priv)
1289{ 1283{
1290 struct drm_intel_overlay_attrs *attrs = data; 1284 struct drm_intel_overlay_attrs *attrs = data;
1291 struct drm_i915_private *dev_priv = dev->dev_private; 1285 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1309,7 +1303,7 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
1309 attrs->contrast = overlay->contrast; 1303 attrs->contrast = overlay->contrast;
1310 attrs->saturation = overlay->saturation; 1304 attrs->saturation = overlay->saturation;
1311 1305
1312 if (!IS_GEN2(dev)) { 1306 if (!IS_GEN2(dev_priv)) {
1313 attrs->gamma0 = I915_READ(OGAMC0); 1307 attrs->gamma0 = I915_READ(OGAMC0);
1314 attrs->gamma1 = I915_READ(OGAMC1); 1308 attrs->gamma1 = I915_READ(OGAMC1);
1315 attrs->gamma2 = I915_READ(OGAMC2); 1309 attrs->gamma2 = I915_READ(OGAMC2);
@@ -1341,7 +1335,7 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
1341 intel_overlay_unmap_regs(overlay, regs); 1335 intel_overlay_unmap_regs(overlay, regs);
1342 1336
1343 if (attrs->flags & I915_OVERLAY_UPDATE_GAMMA) { 1337 if (attrs->flags & I915_OVERLAY_UPDATE_GAMMA) {
1344 if (IS_GEN2(dev)) 1338 if (IS_GEN2(dev_priv))
1345 goto out_unlock; 1339 goto out_unlock;
1346 1340
1347 if (overlay->active) { 1341 if (overlay->active) {
@@ -1371,37 +1365,36 @@ out_unlock:
1371 return ret; 1365 return ret;
1372} 1366}
1373 1367
1374void intel_setup_overlay(struct drm_device *dev) 1368void intel_setup_overlay(struct drm_i915_private *dev_priv)
1375{ 1369{
1376 struct drm_i915_private *dev_priv = dev->dev_private;
1377 struct intel_overlay *overlay; 1370 struct intel_overlay *overlay;
1378 struct drm_i915_gem_object *reg_bo; 1371 struct drm_i915_gem_object *reg_bo;
1379 struct overlay_registers __iomem *regs; 1372 struct overlay_registers __iomem *regs;
1380 int ret; 1373 int ret;
1381 1374
1382 if (!HAS_OVERLAY(dev)) 1375 if (!HAS_OVERLAY(dev_priv))
1383 return; 1376 return;
1384 1377
1385 overlay = kzalloc(sizeof(*overlay), GFP_KERNEL); 1378 overlay = kzalloc(sizeof(*overlay), GFP_KERNEL);
1386 if (!overlay) 1379 if (!overlay)
1387 return; 1380 return;
1388 1381
1389 mutex_lock(&dev->struct_mutex); 1382 mutex_lock(&dev_priv->dev->struct_mutex);
1390 if (WARN_ON(dev_priv->overlay)) 1383 if (WARN_ON(dev_priv->overlay))
1391 goto out_free; 1384 goto out_free;
1392 1385
1393 overlay->dev = dev; 1386 overlay->i915 = dev_priv;
1394 1387
1395 reg_bo = NULL; 1388 reg_bo = NULL;
1396 if (!OVERLAY_NEEDS_PHYSICAL(dev)) 1389 if (!OVERLAY_NEEDS_PHYSICAL(dev_priv))
1397 reg_bo = i915_gem_object_create_stolen(dev, PAGE_SIZE); 1390 reg_bo = i915_gem_object_create_stolen(dev_priv->dev, PAGE_SIZE);
1398 if (reg_bo == NULL)
1399 reg_bo = i915_gem_alloc_object(dev, PAGE_SIZE);
1400 if (reg_bo == NULL) 1391 if (reg_bo == NULL)
1392 reg_bo = i915_gem_object_create(dev_priv->dev, PAGE_SIZE);
1393 if (IS_ERR(reg_bo))
1401 goto out_free; 1394 goto out_free;
1402 overlay->reg_bo = reg_bo; 1395 overlay->reg_bo = reg_bo;
1403 1396
1404 if (OVERLAY_NEEDS_PHYSICAL(dev)) { 1397 if (OVERLAY_NEEDS_PHYSICAL(dev_priv)) {
1405 ret = i915_gem_object_attach_phys(reg_bo, PAGE_SIZE); 1398 ret = i915_gem_object_attach_phys(reg_bo, PAGE_SIZE);
1406 if (ret) { 1399 if (ret) {
1407 DRM_ERROR("failed to attach phys overlay regs\n"); 1400 DRM_ERROR("failed to attach phys overlay regs\n");
@@ -1441,25 +1434,23 @@ void intel_setup_overlay(struct drm_device *dev)
1441 intel_overlay_unmap_regs(overlay, regs); 1434 intel_overlay_unmap_regs(overlay, regs);
1442 1435
1443 dev_priv->overlay = overlay; 1436 dev_priv->overlay = overlay;
1444 mutex_unlock(&dev->struct_mutex); 1437 mutex_unlock(&dev_priv->dev->struct_mutex);
1445 DRM_INFO("initialized overlay support\n"); 1438 DRM_INFO("initialized overlay support\n");
1446 return; 1439 return;
1447 1440
1448out_unpin_bo: 1441out_unpin_bo:
1449 if (!OVERLAY_NEEDS_PHYSICAL(dev)) 1442 if (!OVERLAY_NEEDS_PHYSICAL(dev_priv))
1450 i915_gem_object_ggtt_unpin(reg_bo); 1443 i915_gem_object_ggtt_unpin(reg_bo);
1451out_free_bo: 1444out_free_bo:
1452 drm_gem_object_unreference(&reg_bo->base); 1445 drm_gem_object_unreference(&reg_bo->base);
1453out_free: 1446out_free:
1454 mutex_unlock(&dev->struct_mutex); 1447 mutex_unlock(&dev_priv->dev->struct_mutex);
1455 kfree(overlay); 1448 kfree(overlay);
1456 return; 1449 return;
1457} 1450}
1458 1451
1459void intel_cleanup_overlay(struct drm_device *dev) 1452void intel_cleanup_overlay(struct drm_i915_private *dev_priv)
1460{ 1453{
1461 struct drm_i915_private *dev_priv = dev->dev_private;
1462
1463 if (!dev_priv->overlay) 1454 if (!dev_priv->overlay)
1464 return; 1455 return;
1465 1456
@@ -1482,18 +1473,17 @@ struct intel_overlay_error_state {
1482static struct overlay_registers __iomem * 1473static struct overlay_registers __iomem *
1483intel_overlay_map_regs_atomic(struct intel_overlay *overlay) 1474intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
1484{ 1475{
1485 struct drm_i915_private *dev_priv = to_i915(overlay->dev); 1476 struct drm_i915_private *dev_priv = overlay->i915;
1486 struct i915_ggtt *ggtt = &dev_priv->ggtt;
1487 struct overlay_registers __iomem *regs; 1477 struct overlay_registers __iomem *regs;
1488 1478
1489 if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) 1479 if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
1490 /* Cast to make sparse happy, but it's wc memory anyway, so 1480 /* Cast to make sparse happy, but it's wc memory anyway, so
1491 * equivalent to the wc io mapping on X86. */ 1481 * equivalent to the wc io mapping on X86. */
1492 regs = (struct overlay_registers __iomem *) 1482 regs = (struct overlay_registers __iomem *)
1493 overlay->reg_bo->phys_handle->vaddr; 1483 overlay->reg_bo->phys_handle->vaddr;
1494 else 1484 else
1495 regs = io_mapping_map_atomic_wc(ggtt->mappable, 1485 regs = io_mapping_map_atomic_wc(dev_priv->ggtt.mappable,
1496 i915_gem_obj_ggtt_offset(overlay->reg_bo)); 1486 overlay->flip_addr);
1497 1487
1498 return regs; 1488 return regs;
1499} 1489}
@@ -1501,15 +1491,13 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
1501static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay, 1491static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay,
1502 struct overlay_registers __iomem *regs) 1492 struct overlay_registers __iomem *regs)
1503{ 1493{
1504 if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev)) 1494 if (!OVERLAY_NEEDS_PHYSICAL(overlay->i915))
1505 io_mapping_unmap_atomic(regs); 1495 io_mapping_unmap_atomic(regs);
1506} 1496}
1507 1497
1508
1509struct intel_overlay_error_state * 1498struct intel_overlay_error_state *
1510intel_overlay_capture_error_state(struct drm_device *dev) 1499intel_overlay_capture_error_state(struct drm_i915_private *dev_priv)
1511{ 1500{
1512 struct drm_i915_private *dev_priv = dev->dev_private;
1513 struct intel_overlay *overlay = dev_priv->overlay; 1501 struct intel_overlay *overlay = dev_priv->overlay;
1514 struct intel_overlay_error_state *error; 1502 struct intel_overlay_error_state *error;
1515 struct overlay_registers __iomem *regs; 1503 struct overlay_registers __iomem *regs;
@@ -1523,10 +1511,7 @@ intel_overlay_capture_error_state(struct drm_device *dev)
1523 1511
1524 error->dovsta = I915_READ(DOVSTA); 1512 error->dovsta = I915_READ(DOVSTA);
1525 error->isr = I915_READ(ISR); 1513 error->isr = I915_READ(ISR);
1526 if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) 1514 error->base = overlay->flip_addr;
1527 error->base = (__force long)overlay->reg_bo->phys_handle->vaddr;
1528 else
1529 error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo);
1530 1515
1531 regs = intel_overlay_map_regs_atomic(overlay); 1516 regs = intel_overlay_map_regs_atomic(overlay);
1532 if (!regs) 1517 if (!regs)