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authorDaniel Kurtz <djkurtz@chromium.org>2012-03-30 07:46:36 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-12 15:14:06 -0400
commit26883c31b0799e76edf8f0ea8be48b64e09b2a7d (patch)
treea8ff83254d592500a16ed7843e103eb87316299d /drivers/gpu/drm/i915/intel_i2c.c
parent3fdcf43192559f53305644d0c1e0f7dda398f091 (diff)
drm/i915/intel_i2c: handle zero-length writes
A common method of probing an i2c bus is trying to do a zero-length write. Handle this case by checking the length first before decrementing it. This is actually important, since attempting a zero-length write is one of the ways that i2cdetect and i2c_new_probed_device detect whether there is device present on the bus with a given address. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index c12db7265893..99a04f8bcb1f 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -248,9 +248,10 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
248 u32 val, loop; 248 u32 val, loop;
249 249
250 val = loop = 0; 250 val = loop = 0;
251 do { 251 while (len && loop < 4) {
252 val |= *buf++ << (8 * loop); 252 val |= *buf++ << (8 * loop++);
253 } while (--len && ++loop < 4); 253 len -= 1;
254 }
254 255
255 I915_WRITE(GMBUS3 + reg_offset, val); 256 I915_WRITE(GMBUS3 + reg_offset, val);
256 I915_WRITE(GMBUS1 + reg_offset, 257 I915_WRITE(GMBUS1 + reg_offset,