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authorChris Wilson <chris@chris-wilson.co.uk>2017-10-04 08:41:53 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2017-10-04 10:05:40 -0400
commit8d488bbec73fa36907e1b327e919bcd522b4a57f (patch)
treeef77eed16d162b53407d2fc189d7496a80009827 /drivers/gpu/drm/i915/intel_engine_cs.c
parent53221e11c7a0e85004c1a28f74e4e173f098d262 (diff)
drm/i915: Remove WA_(SET|CLR)_BIT
These macros are of dubious merit when coupled with the per-context w/a set. Instead of tweaking the value in the context, they tweak the value based on the mmio at the time of recording; they are almost by definition not per-context! Having removed the last users, remove the macros to avoid temptation in the future. v2: Kill WA_WRITE as well (now also unused). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171004124153.14142-2-chris@chris-wilson.co.uk Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_engine_cs.c')
-rw-r--r--drivers/gpu/drm/i915/intel_engine_cs.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 8625feb0939e..e804a9b816f1 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -830,11 +830,6 @@ static int wa_add(struct drm_i915_private *dev_priv,
830#define WA_SET_FIELD_MASKED(addr, mask, value) \ 830#define WA_SET_FIELD_MASKED(addr, mask, value) \
831 WA_REG(addr, mask, _MASKED_FIELD(mask, value)) 831 WA_REG(addr, mask, _MASKED_FIELD(mask, value))
832 832
833#define WA_SET_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) | (mask))
834#define WA_CLR_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) & ~(mask))
835
836#define WA_WRITE(addr, val) WA_REG(addr, 0xffffffff, val)
837
838static int wa_ring_whitelist_reg(struct intel_engine_cs *engine, 833static int wa_ring_whitelist_reg(struct intel_engine_cs *engine,
839 i915_reg_t reg) 834 i915_reg_t reg)
840{ 835{