drm/i915: Make execlist port count variable

As we emulate execlists on top of the GuC workqueue, it is not
restricted to just 2 ports and we can increase that number arbitrarily
to trade-off queue depth (i.e. scheduling latency) against pipeline
bubbles.

v2: rebase. better commit msg (Chris)
v3: rebase

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20170922124307.10914-5-mika.kuoppala@intel.com

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 30035e59a784..a28e2a864cf1 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -405,6 +405,10 @@ static void intel_engine_init_execlist(struct intel_engine_cs *engine)
 
         execlists->csb_use_mmio = csb_force_mmio(engine->i915);
 
+        execlists->port_mask = 1;
+        BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
+        GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
+
         execlists->queue = RB_ROOT;
         execlists->first = NULL;
 }