diff options
author | Dave Airlie <airlied@redhat.com> | 2018-09-27 19:37:51 -0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2018-09-27 19:37:55 -0400 |
commit | db9825c95498280718c4687fcf712016f5b6f5f6 (patch) | |
tree | 01661a811bcd16a7b6f3ee9790e77da75fd178b0 /drivers/gpu/drm/i915/intel_drv.h | |
parent | 156e60bc71aa31a3b42b1d66a822c2999bd0994c (diff) | |
parent | 448626103dad54ec5d06722e955586b5d557625d (diff) |
Merge tag 'drm-intel-next-2018-09-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Driver Changes:
- Bugzilla 107600: Fix stuttering video playback on MythTV on old hardware (Chris)
- Avoid black screen when using CSC coefficient matrix (Raviraj)
- Hammer PDs on Baytrail to make sure they reload (Chris)
- Capture some objects if unable to capture all, on error (Chris)
- Add W/A for 16 GB DIMMs on SKL+ (Mahesh)
- Only enable IPC for symmetric memory configurations on KBL+ (Mahesh)
- Assume pipe A to have maximum stride limits (Ville)
- Always update update OA contexts via context image (Tvrtko)
- Icelake enabling patches (Madhav, Dhinakaran)
- Add Icelake DMC firmware (Anusha)
- Fixes for CI found corner cases (Chris)
- Limit the backpressure for request allocation (Chris)
- Park GPU on module load so usage starts from known state (Chris)
- Flush tasklet when checking for idle (Chris)
- Use coherent write into the context image on BSW+ (Chris)
- Fix possible integer overflow for framebuffers that get aligned past 4GiB (Ville)
- Downgrade fence timeout from warn to notice and add debug hint (Chris)
- Fixes to multi function encoder code (Ville)
- Fix sprite plane check logic (Dan, Ville)
- PAGE_SIZE vs. I915_GTT_PAGE_SIZE fixes (Ville)
- Decode memory bandwidth and parameters for BXT and SKL+ (Mahesh)
- Overwrite BIOS set IPC value from KMS (Mahesh)
- Multiple pipe handling code cleanups/restructurings/optimizations (Ville)
- Spare low 4G address for non-48bit objects (Chris)
- Free context_setparam of struct_mutex (Chris)
- Delay updating ring register state on resume (Chris)
- Avoid unnecessarily copying overlay IOCTL parameters (Chris)
- Update GuC power domain states even without submission (Michal)
- Restore GuC preempt-context across S3/S4 (Chris)
- Add kernel selftest for rapid context switching (Chris)
- Keep runtime power management ref for live selftests (Chris)
- GEM code cleanups (Matt)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927095933.GA11458@jlahtine-desk.ger.corp.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 45 |
1 files changed, 28 insertions, 17 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index f5731215210a..bf1c38728a59 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -497,18 +497,21 @@ struct intel_atomic_state { | |||
497 | 497 | ||
498 | struct intel_plane_state { | 498 | struct intel_plane_state { |
499 | struct drm_plane_state base; | 499 | struct drm_plane_state base; |
500 | struct i915_ggtt_view view; | ||
500 | struct i915_vma *vma; | 501 | struct i915_vma *vma; |
501 | unsigned long flags; | 502 | unsigned long flags; |
502 | #define PLANE_HAS_FENCE BIT(0) | 503 | #define PLANE_HAS_FENCE BIT(0) |
503 | 504 | ||
504 | struct { | 505 | struct { |
505 | u32 offset; | 506 | u32 offset; |
507 | /* | ||
508 | * Plane stride in: | ||
509 | * bytes for 0/180 degree rotation | ||
510 | * pixels for 90/270 degree rotation | ||
511 | */ | ||
512 | u32 stride; | ||
506 | int x, y; | 513 | int x, y; |
507 | } main; | 514 | } color_plane[2]; |
508 | struct { | ||
509 | u32 offset; | ||
510 | int x, y; | ||
511 | } aux; | ||
512 | 515 | ||
513 | /* plane control register */ | 516 | /* plane control register */ |
514 | u32 ctl; | 517 | u32 ctl; |
@@ -950,10 +953,8 @@ struct intel_plane { | |||
950 | enum i9xx_plane_id i9xx_plane; | 953 | enum i9xx_plane_id i9xx_plane; |
951 | enum plane_id id; | 954 | enum plane_id id; |
952 | enum pipe pipe; | 955 | enum pipe pipe; |
953 | bool can_scale; | ||
954 | bool has_fbc; | 956 | bool has_fbc; |
955 | bool has_ccs; | 957 | bool has_ccs; |
956 | int max_downscale; | ||
957 | uint32_t frontbuffer_bit; | 958 | uint32_t frontbuffer_bit; |
958 | 959 | ||
959 | struct { | 960 | struct { |
@@ -966,6 +967,9 @@ struct intel_plane { | |||
966 | * the intel_plane_state structure and accessed via plane_state. | 967 | * the intel_plane_state structure and accessed via plane_state. |
967 | */ | 968 | */ |
968 | 969 | ||
970 | unsigned int (*max_stride)(struct intel_plane *plane, | ||
971 | u32 pixel_format, u64 modifier, | ||
972 | unsigned int rotation); | ||
969 | void (*update_plane)(struct intel_plane *plane, | 973 | void (*update_plane)(struct intel_plane *plane, |
970 | const struct intel_crtc_state *crtc_state, | 974 | const struct intel_crtc_state *crtc_state, |
971 | const struct intel_plane_state *plane_state); | 975 | const struct intel_plane_state *plane_state); |
@@ -1442,7 +1446,7 @@ void icl_unmap_plls_to_ports(struct drm_crtc *crtc, | |||
1442 | struct drm_atomic_state *old_state); | 1446 | struct drm_atomic_state *old_state); |
1443 | 1447 | ||
1444 | unsigned int intel_fb_align_height(const struct drm_framebuffer *fb, | 1448 | unsigned int intel_fb_align_height(const struct drm_framebuffer *fb, |
1445 | int plane, unsigned int height); | 1449 | int color_plane, unsigned int height); |
1446 | 1450 | ||
1447 | /* intel_audio.c */ | 1451 | /* intel_audio.c */ |
1448 | void intel_init_audio_hooks(struct drm_i915_private *dev_priv); | 1452 | void intel_init_audio_hooks(struct drm_i915_private *dev_priv); |
@@ -1565,7 +1569,7 @@ void intel_release_load_detect_pipe(struct drm_connector *connector, | |||
1565 | struct drm_modeset_acquire_ctx *ctx); | 1569 | struct drm_modeset_acquire_ctx *ctx); |
1566 | struct i915_vma * | 1570 | struct i915_vma * |
1567 | intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, | 1571 | intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, |
1568 | unsigned int rotation, | 1572 | const struct i915_ggtt_view *view, |
1569 | bool uses_fence, | 1573 | bool uses_fence, |
1570 | unsigned long *out_flags); | 1574 | unsigned long *out_flags); |
1571 | void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags); | 1575 | void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags); |
@@ -1614,8 +1618,6 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv, | |||
1614 | void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state); | 1618 | void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state); |
1615 | #define assert_pipe_enabled(d, p) assert_pipe(d, p, true) | 1619 | #define assert_pipe_enabled(d, p) assert_pipe(d, p, true) |
1616 | #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) | 1620 | #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) |
1617 | u32 intel_compute_tile_offset(int *x, int *y, | ||
1618 | const struct intel_plane_state *state, int plane); | ||
1619 | void intel_prepare_reset(struct drm_i915_private *dev_priv); | 1621 | void intel_prepare_reset(struct drm_i915_private *dev_priv); |
1620 | void intel_finish_reset(struct drm_i915_private *dev_priv); | 1622 | void intel_finish_reset(struct drm_i915_private *dev_priv); |
1621 | void hsw_enable_pc8(struct drm_i915_private *dev_priv); | 1623 | void hsw_enable_pc8(struct drm_i915_private *dev_priv); |
@@ -1645,8 +1647,8 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, | |||
1645 | 1647 | ||
1646 | u16 skl_scaler_calc_phase(int sub, bool chroma_center); | 1648 | u16 skl_scaler_calc_phase(int sub, bool chroma_center); |
1647 | int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); | 1649 | int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); |
1648 | int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, | 1650 | int skl_max_scale(const struct intel_crtc_state *crtc_state, |
1649 | uint32_t pixel_format); | 1651 | u32 pixel_format); |
1650 | 1652 | ||
1651 | static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state) | 1653 | static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state) |
1652 | { | 1654 | { |
@@ -1658,12 +1660,14 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state, | |||
1658 | u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, | 1660 | u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, |
1659 | const struct intel_plane_state *plane_state); | 1661 | const struct intel_plane_state *plane_state); |
1660 | u32 glk_color_ctl(const struct intel_plane_state *plane_state); | 1662 | u32 glk_color_ctl(const struct intel_plane_state *plane_state); |
1661 | u32 skl_plane_stride(const struct drm_framebuffer *fb, int plane, | 1663 | u32 skl_plane_stride(const struct intel_plane_state *plane_state, |
1662 | unsigned int rotation); | 1664 | int plane); |
1663 | int skl_check_plane_surface(const struct intel_crtc_state *crtc_state, | 1665 | int skl_check_plane_surface(struct intel_plane_state *plane_state); |
1664 | struct intel_plane_state *plane_state); | ||
1665 | int i9xx_check_plane_surface(struct intel_plane_state *plane_state); | 1666 | int i9xx_check_plane_surface(struct intel_plane_state *plane_state); |
1666 | int skl_format_to_fourcc(int format, bool rgb_order, bool alpha); | 1667 | int skl_format_to_fourcc(int format, bool rgb_order, bool alpha); |
1668 | unsigned int i9xx_plane_max_stride(struct intel_plane *plane, | ||
1669 | u32 pixel_format, u64 modifier, | ||
1670 | unsigned int rotation); | ||
1667 | 1671 | ||
1668 | /* intel_csr.c */ | 1672 | /* intel_csr.c */ |
1669 | void intel_csr_ucode_init(struct drm_i915_private *); | 1673 | void intel_csr_ucode_init(struct drm_i915_private *); |
@@ -2131,6 +2135,13 @@ bool skl_plane_has_ccs(struct drm_i915_private *dev_priv, | |||
2131 | enum pipe pipe, enum plane_id plane_id); | 2135 | enum pipe pipe, enum plane_id plane_id); |
2132 | bool skl_plane_has_planar(struct drm_i915_private *dev_priv, | 2136 | bool skl_plane_has_planar(struct drm_i915_private *dev_priv, |
2133 | enum pipe pipe, enum plane_id plane_id); | 2137 | enum pipe pipe, enum plane_id plane_id); |
2138 | unsigned int skl_plane_max_stride(struct intel_plane *plane, | ||
2139 | u32 pixel_format, u64 modifier, | ||
2140 | unsigned int rotation); | ||
2141 | int skl_plane_check(struct intel_crtc_state *crtc_state, | ||
2142 | struct intel_plane_state *plane_state); | ||
2143 | int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state); | ||
2144 | int chv_plane_check_rotation(const struct intel_plane_state *plane_state); | ||
2134 | 2145 | ||
2135 | /* intel_tv.c */ | 2146 | /* intel_tv.c */ |
2136 | void intel_tv_init(struct drm_i915_private *dev_priv); | 2147 | void intel_tv_init(struct drm_i915_private *dev_priv); |