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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-07-24 20:28:12 -0400 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-07-25 16:41:42 -0400 |
| commit | 340a44bef2342b0ff7334017e9e821645fa8ae43 (patch) | |
| tree | d58ca1fd131a5e1b0389dbd834d76afe5a9d28ba /drivers/gpu/drm/i915/intel_dp_mst.c | |
| parent | db7295c2c4efb56efab7f6fe0fc3c646d200630a (diff) | |
drm/i915/icl: program MG_DP_MODE
Programming this register is part of the Enable Sequence for
DisplayPort on ICL. Do as the spec says.
v2: Simple rebase.
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180725002813.6938-5-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions