diff options
| author | Adam Jackson <ajax@redhat.com> | 2009-12-03 17:14:42 -0500 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2009-12-07 17:55:56 -0500 |
| commit | f2b115e69d46344ae7afcaad5823496d2a0d8650 (patch) | |
| tree | 8bf56f7d43e3462a26088317bad04f04b676d26c /drivers/gpu/drm/i915/intel_dp.c | |
| parent | 107f517b8f2a9d5858e640bc046606b1cff14bb5 (diff) | |
drm/i915: Fix product names and #defines
IGD* isn't a useful name. Replace with the codenames, as sourced from
pci.ids.
Signed-off-by: Adam Jackson <ajax@redhat.com>
[anholt: Fixed up for merge with pineview/ironlake changes]
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 24d3bdeb9842..632f1b44c28a 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
| @@ -224,8 +224,8 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
| 224 | */ | 224 | */ |
| 225 | if (IS_eDP(intel_output)) | 225 | if (IS_eDP(intel_output)) |
| 226 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ | 226 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ |
| 227 | else if (IS_IGDNG(dev)) | 227 | else if (IS_IRONLAKE(dev)) |
| 228 | aux_clock_divider = 62; /* IGDNG: input clock fixed at 125Mhz */ | 228 | aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */ |
| 229 | else | 229 | else |
| 230 | aux_clock_divider = intel_hrawclk(dev) / 2; | 230 | aux_clock_divider = intel_hrawclk(dev) / 2; |
| 231 | 231 | ||
| @@ -516,7 +516,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
| 516 | intel_dp_compute_m_n(3, lane_count, | 516 | intel_dp_compute_m_n(3, lane_count, |
| 517 | mode->clock, adjusted_mode->clock, &m_n); | 517 | mode->clock, adjusted_mode->clock, &m_n); |
| 518 | 518 | ||
| 519 | if (IS_IGDNG(dev)) { | 519 | if (IS_IRONLAKE(dev)) { |
| 520 | if (intel_crtc->pipe == 0) { | 520 | if (intel_crtc->pipe == 0) { |
| 521 | I915_WRITE(TRANSA_DATA_M1, | 521 | I915_WRITE(TRANSA_DATA_M1, |
| 522 | ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | | 522 | ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | |
| @@ -608,7 +608,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
| 608 | } | 608 | } |
| 609 | } | 609 | } |
| 610 | 610 | ||
| 611 | static void igdng_edp_backlight_on (struct drm_device *dev) | 611 | static void ironlake_edp_backlight_on (struct drm_device *dev) |
| 612 | { | 612 | { |
| 613 | struct drm_i915_private *dev_priv = dev->dev_private; | 613 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 614 | u32 pp; | 614 | u32 pp; |
| @@ -619,7 +619,7 @@ static void igdng_edp_backlight_on (struct drm_device *dev) | |||
| 619 | I915_WRITE(PCH_PP_CONTROL, pp); | 619 | I915_WRITE(PCH_PP_CONTROL, pp); |
| 620 | } | 620 | } |
| 621 | 621 | ||
| 622 | static void igdng_edp_backlight_off (struct drm_device *dev) | 622 | static void ironlake_edp_backlight_off (struct drm_device *dev) |
| 623 | { | 623 | { |
| 624 | struct drm_i915_private *dev_priv = dev->dev_private; | 624 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 625 | u32 pp; | 625 | u32 pp; |
| @@ -643,13 +643,13 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | |||
| 643 | if (dp_reg & DP_PORT_EN) { | 643 | if (dp_reg & DP_PORT_EN) { |
| 644 | intel_dp_link_down(intel_output, dp_priv->DP); | 644 | intel_dp_link_down(intel_output, dp_priv->DP); |
| 645 | if (IS_eDP(intel_output)) | 645 | if (IS_eDP(intel_output)) |
| 646 | igdng_edp_backlight_off(dev); | 646 | ironlake_edp_backlight_off(dev); |
| 647 | } | 647 | } |
| 648 | } else { | 648 | } else { |
| 649 | if (!(dp_reg & DP_PORT_EN)) { | 649 | if (!(dp_reg & DP_PORT_EN)) { |
| 650 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); | 650 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); |
| 651 | if (IS_eDP(intel_output)) | 651 | if (IS_eDP(intel_output)) |
| 652 | igdng_edp_backlight_on(dev); | 652 | ironlake_edp_backlight_on(dev); |
| 653 | } | 653 | } |
| 654 | } | 654 | } |
| 655 | dp_priv->dpms_mode = mode; | 655 | dp_priv->dpms_mode = mode; |
| @@ -1073,7 +1073,7 @@ intel_dp_check_link_status(struct intel_output *intel_output) | |||
| 1073 | } | 1073 | } |
| 1074 | 1074 | ||
| 1075 | static enum drm_connector_status | 1075 | static enum drm_connector_status |
| 1076 | igdng_dp_detect(struct drm_connector *connector) | 1076 | ironlake_dp_detect(struct drm_connector *connector) |
| 1077 | { | 1077 | { |
| 1078 | struct intel_output *intel_output = to_intel_output(connector); | 1078 | struct intel_output *intel_output = to_intel_output(connector); |
| 1079 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1079 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; |
| @@ -1108,8 +1108,8 @@ intel_dp_detect(struct drm_connector *connector) | |||
| 1108 | 1108 | ||
| 1109 | dp_priv->has_audio = false; | 1109 | dp_priv->has_audio = false; |
| 1110 | 1110 | ||
| 1111 | if (IS_IGDNG(dev)) | 1111 | if (IS_IRONLAKE(dev)) |
| 1112 | return igdng_dp_detect(connector); | 1112 | return ironlake_dp_detect(connector); |
| 1113 | 1113 | ||
| 1114 | temp = I915_READ(PORT_HOTPLUG_EN); | 1114 | temp = I915_READ(PORT_HOTPLUG_EN); |
| 1115 | 1115 | ||
