diff options
author | Dave Airlie <airlied@redhat.com> | 2017-12-03 18:40:35 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2017-12-03 19:56:53 -0500 |
commit | ca797d29cd63e7b71b4eea29aff3b1cefd1ecb59 (patch) | |
tree | db1ada69f713da68b43c828bd15f90e250f86ab7 /drivers/gpu/drm/i915/intel_dp.c | |
parent | 2c1c55cb75a9c72f9726fabb8c3607947711a8df (diff) | |
parent | 010d118c20617021025a930bc8e90f371ab99da5 (diff) |
Merge tag 'drm-intel-next-2017-11-17-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
More change sets for 4.16:
- Many improvements for selftests and other igt tests (Chris)
- Forcewake with PUNIT->PMIC bus fixes and robustness (Hans)
- Define an engine class for uABI (Tvrtko)
- Context switch fixes and improvements (Chris)
- GT powersavings and power gating simplification and fixes (Chris)
- Other general driver clean-ups (Chris, Lucas, Ville)
- Removing old, useless and/or bad workarounds (Chris, Oscar, Radhakrishna)
- IPS, pipe config, etc in preparation for another Fast Boot attempt (Maarten)
- OA perf fixes and support to Coffee Lake and Cannonlake (Lionel)
- Fixes around GPU fault registers (Michel)
- GEM Proxy (Tina)
- Refactor of Geminilake and Cannonlake plane color handling (James)
- Generalize transcoder loop (Mika Kahola)
- New HW Workaround for Cannonlake and Geminilake (Rodrigo)
- Resume GuC before using GEM (Chris)
- Stolen Memory handling improvements (Ville)
- Initialize entry in PPAT for older compilers (Chris)
- Other fixes and robustness improvements on execbuf (Chris)
- Improve logs of GEM_BUG_ON (Mika Kuoppala)
- Rework with massive rename of GuC functions and files (Sagar)
- Don't sanitize frame start delay if pipe is off (Ville)
- Cannonlake clock fixes (Rodrigo)
- Cannonlake HDMI 2.0 support (Rodrigo)
- Add a GuC doorbells selftest (Michel)
- Add might_sleep() check to our wait_for() (Chris)
Many GVT changes for 4.16:
- CSB HWSP update support (Weinan)
- GVT debug helpers, dyndbg and debugfs (Chuanxiao, Shuo)
- full virtualized opregion (Xiaolin)
- VM health check for sane fallback (Fred)
- workload submission code refactor for future enabling (Zhi)
- Updated repo URL in MAINTAINERS (Zhenyu)
- other many misc fixes
* tag 'drm-intel-next-2017-11-17-1' of git://anongit.freedesktop.org/drm/drm-intel: (260 commits)
drm/i915: Update DRIVER_DATE to 20171117
drm/i915: Add a policy note for removing workarounds
drm/i915/selftests: Report ENOMEM clearly for an allocation failure
Revert "drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk"
drm/i915: Calculate g4x intermediate watermarks correctly
drm/i915: Calculate vlv/chv intermediate watermarks correctly, v3.
drm/i915: Pass crtc_state to ips toggle functions, v2
drm/i915: Pass idle crtc_state to intel_dp_sink_crc
drm/i915: Enable FIFO underrun reporting after initial fastset, v4.
drm/i915: Mark the userptr invalidate workqueue as WQ_MEM_RECLAIM
drm/i915: Add might_sleep() check to wait_for()
drm/i915/selftests: Add a GuC doorbells selftest
drm/i915/cnl: Extend HDMI 2.0 support to CNL.
drm/i915/cnl: Simplify dco_fraction calculation.
drm/i915/cnl: Don't blindly replace qdiv.
drm/i915/cnl: Fix wrpll math for higher freqs.
drm/i915/cnl: Fix, simplify and unify wrpll variable sizes.
drm/i915/cnl: Remove useless conversion.
drm/i915/cnl: Remove spurious central_freq.
drm/i915/selftests: exercise_ggtt may have nothing to do
...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 516 |
1 files changed, 238 insertions, 278 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 65260fb35d2a..bbf2256ba574 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -129,11 +129,13 @@ static struct intel_dp *intel_attached_dp(struct drm_connector *connector) | |||
129 | return enc_to_intel_dp(&intel_attached_encoder(connector)->base); | 129 | return enc_to_intel_dp(&intel_attached_encoder(connector)->base); |
130 | } | 130 | } |
131 | 131 | ||
132 | static void intel_dp_link_down(struct intel_dp *intel_dp); | 132 | static void intel_dp_link_down(struct intel_encoder *encoder, |
133 | const struct intel_crtc_state *old_crtc_state); | ||
133 | static bool edp_panel_vdd_on(struct intel_dp *intel_dp); | 134 | static bool edp_panel_vdd_on(struct intel_dp *intel_dp); |
134 | static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync); | 135 | static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync); |
135 | static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp); | 136 | static void vlv_init_panel_power_sequencer(struct intel_encoder *encoder, |
136 | static void vlv_steal_power_sequencer(struct drm_device *dev, | 137 | const struct intel_crtc_state *crtc_state); |
138 | static void vlv_steal_power_sequencer(struct drm_i915_private *dev_priv, | ||
137 | enum pipe pipe); | 139 | enum pipe pipe); |
138 | static void intel_dp_unset_edid(struct intel_dp *intel_dp); | 140 | static void intel_dp_unset_edid(struct intel_dp *intel_dp); |
139 | 141 | ||
@@ -221,7 +223,7 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp) | |||
221 | { | 223 | { |
222 | struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); | 224 | struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); |
223 | struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); | 225 | struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); |
224 | enum port port = dig_port->port; | 226 | enum port port = dig_port->base.port; |
225 | const int *source_rates; | 227 | const int *source_rates; |
226 | int size; | 228 | int size; |
227 | u32 voltage; | 229 | u32 voltage; |
@@ -427,24 +429,19 @@ static void intel_dp_unpack_aux(uint32_t src, uint8_t *dst, int dst_bytes) | |||
427 | } | 429 | } |
428 | 430 | ||
429 | static void | 431 | static void |
430 | intel_dp_init_panel_power_sequencer(struct drm_device *dev, | 432 | intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp); |
431 | struct intel_dp *intel_dp); | ||
432 | static void | 433 | static void |
433 | intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev, | 434 | intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, |
434 | struct intel_dp *intel_dp, | ||
435 | bool force_disable_vdd); | 435 | bool force_disable_vdd); |
436 | static void | 436 | static void |
437 | intel_dp_pps_init(struct drm_device *dev, struct intel_dp *intel_dp); | 437 | intel_dp_pps_init(struct intel_dp *intel_dp); |
438 | 438 | ||
439 | static void pps_lock(struct intel_dp *intel_dp) | 439 | static void pps_lock(struct intel_dp *intel_dp) |
440 | { | 440 | { |
441 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 441 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
442 | struct intel_encoder *encoder = &intel_dig_port->base; | ||
443 | struct drm_device *dev = encoder->base.dev; | ||
444 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
445 | 442 | ||
446 | /* | 443 | /* |
447 | * See vlv_power_sequencer_reset() why we need | 444 | * See intel_power_sequencer_reset() why we need |
448 | * a power domain reference here. | 445 | * a power domain reference here. |
449 | */ | 446 | */ |
450 | intel_display_power_get(dev_priv, intel_dp->aux_power_domain); | 447 | intel_display_power_get(dev_priv, intel_dp->aux_power_domain); |
@@ -454,10 +451,7 @@ static void pps_lock(struct intel_dp *intel_dp) | |||
454 | 451 | ||
455 | static void pps_unlock(struct intel_dp *intel_dp) | 452 | static void pps_unlock(struct intel_dp *intel_dp) |
456 | { | 453 | { |
457 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 454 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
458 | struct intel_encoder *encoder = &intel_dig_port->base; | ||
459 | struct drm_device *dev = encoder->base.dev; | ||
460 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
461 | 455 | ||
462 | mutex_unlock(&dev_priv->pps_mutex); | 456 | mutex_unlock(&dev_priv->pps_mutex); |
463 | 457 | ||
@@ -467,8 +461,8 @@ static void pps_unlock(struct intel_dp *intel_dp) | |||
467 | static void | 461 | static void |
468 | vlv_power_sequencer_kick(struct intel_dp *intel_dp) | 462 | vlv_power_sequencer_kick(struct intel_dp *intel_dp) |
469 | { | 463 | { |
464 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
470 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 465 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
471 | struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); | ||
472 | enum pipe pipe = intel_dp->pps_pipe; | 466 | enum pipe pipe = intel_dp->pps_pipe; |
473 | bool pll_enabled, release_cl_override = false; | 467 | bool pll_enabled, release_cl_override = false; |
474 | enum dpio_phy phy = DPIO_PHY(pipe); | 468 | enum dpio_phy phy = DPIO_PHY(pipe); |
@@ -477,11 +471,11 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp) | |||
477 | 471 | ||
478 | if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, | 472 | if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, |
479 | "skipping pipe %c power seqeuncer kick due to port %c being active\n", | 473 | "skipping pipe %c power seqeuncer kick due to port %c being active\n", |
480 | pipe_name(pipe), port_name(intel_dig_port->port))) | 474 | pipe_name(pipe), port_name(intel_dig_port->base.port))) |
481 | return; | 475 | return; |
482 | 476 | ||
483 | DRM_DEBUG_KMS("kicking pipe %c power sequencer for port %c\n", | 477 | DRM_DEBUG_KMS("kicking pipe %c power sequencer for port %c\n", |
484 | pipe_name(pipe), port_name(intel_dig_port->port)); | 478 | pipe_name(pipe), port_name(intel_dig_port->base.port)); |
485 | 479 | ||
486 | /* Preserve the BIOS-computed detected bit. This is | 480 | /* Preserve the BIOS-computed detected bit. This is |
487 | * supposed to be read-only. | 481 | * supposed to be read-only. |
@@ -578,9 +572,8 @@ static enum pipe vlv_find_free_pps(struct drm_i915_private *dev_priv) | |||
578 | static enum pipe | 572 | static enum pipe |
579 | vlv_power_sequencer_pipe(struct intel_dp *intel_dp) | 573 | vlv_power_sequencer_pipe(struct intel_dp *intel_dp) |
580 | { | 574 | { |
575 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
581 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 576 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
582 | struct drm_device *dev = intel_dig_port->base.base.dev; | ||
583 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
584 | enum pipe pipe; | 577 | enum pipe pipe; |
585 | 578 | ||
586 | lockdep_assert_held(&dev_priv->pps_mutex); | 579 | lockdep_assert_held(&dev_priv->pps_mutex); |
@@ -603,16 +596,16 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp) | |||
603 | if (WARN_ON(pipe == INVALID_PIPE)) | 596 | if (WARN_ON(pipe == INVALID_PIPE)) |
604 | pipe = PIPE_A; | 597 | pipe = PIPE_A; |
605 | 598 | ||
606 | vlv_steal_power_sequencer(dev, pipe); | 599 | vlv_steal_power_sequencer(dev_priv, pipe); |
607 | intel_dp->pps_pipe = pipe; | 600 | intel_dp->pps_pipe = pipe; |
608 | 601 | ||
609 | DRM_DEBUG_KMS("picked pipe %c power sequencer for port %c\n", | 602 | DRM_DEBUG_KMS("picked pipe %c power sequencer for port %c\n", |
610 | pipe_name(intel_dp->pps_pipe), | 603 | pipe_name(intel_dp->pps_pipe), |
611 | port_name(intel_dig_port->port)); | 604 | port_name(intel_dig_port->base.port)); |
612 | 605 | ||
613 | /* init power sequencer on this pipe and port */ | 606 | /* init power sequencer on this pipe and port */ |
614 | intel_dp_init_panel_power_sequencer(dev, intel_dp); | 607 | intel_dp_init_panel_power_sequencer(intel_dp); |
615 | intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, true); | 608 | intel_dp_init_panel_power_sequencer_registers(intel_dp, true); |
616 | 609 | ||
617 | /* | 610 | /* |
618 | * Even vdd force doesn't work until we've made | 611 | * Even vdd force doesn't work until we've made |
@@ -626,9 +619,7 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp) | |||
626 | static int | 619 | static int |
627 | bxt_power_sequencer_idx(struct intel_dp *intel_dp) | 620 | bxt_power_sequencer_idx(struct intel_dp *intel_dp) |
628 | { | 621 | { |
629 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 622 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
630 | struct drm_device *dev = intel_dig_port->base.base.dev; | ||
631 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
632 | 623 | ||
633 | lockdep_assert_held(&dev_priv->pps_mutex); | 624 | lockdep_assert_held(&dev_priv->pps_mutex); |
634 | 625 | ||
@@ -649,7 +640,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp) | |||
649 | * Only the HW needs to be reprogrammed, the SW state is fixed and | 640 | * Only the HW needs to be reprogrammed, the SW state is fixed and |
650 | * has been setup during connector init. | 641 | * has been setup during connector init. |
651 | */ | 642 | */ |
652 | intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, false); | 643 | intel_dp_init_panel_power_sequencer_registers(intel_dp, false); |
653 | 644 | ||
654 | return 0; | 645 | return 0; |
655 | } | 646 | } |
@@ -701,10 +692,9 @@ vlv_initial_pps_pipe(struct drm_i915_private *dev_priv, | |||
701 | static void | 692 | static void |
702 | vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp) | 693 | vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp) |
703 | { | 694 | { |
695 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
704 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 696 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
705 | struct drm_device *dev = intel_dig_port->base.base.dev; | 697 | enum port port = intel_dig_port->base.port; |
706 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
707 | enum port port = intel_dig_port->port; | ||
708 | 698 | ||
709 | lockdep_assert_held(&dev_priv->pps_mutex); | 699 | lockdep_assert_held(&dev_priv->pps_mutex); |
710 | 700 | ||
@@ -731,13 +721,12 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp) | |||
731 | DRM_DEBUG_KMS("initial power sequencer for port %c: pipe %c\n", | 721 | DRM_DEBUG_KMS("initial power sequencer for port %c: pipe %c\n", |
732 | port_name(port), pipe_name(intel_dp->pps_pipe)); | 722 | port_name(port), pipe_name(intel_dp->pps_pipe)); |
733 | 723 | ||
734 | intel_dp_init_panel_power_sequencer(dev, intel_dp); | 724 | intel_dp_init_panel_power_sequencer(intel_dp); |
735 | intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, false); | 725 | intel_dp_init_panel_power_sequencer_registers(intel_dp, false); |
736 | } | 726 | } |
737 | 727 | ||
738 | void intel_power_sequencer_reset(struct drm_i915_private *dev_priv) | 728 | void intel_power_sequencer_reset(struct drm_i915_private *dev_priv) |
739 | { | 729 | { |
740 | struct drm_device *dev = &dev_priv->drm; | ||
741 | struct intel_encoder *encoder; | 730 | struct intel_encoder *encoder; |
742 | 731 | ||
743 | if (WARN_ON(!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && | 732 | if (WARN_ON(!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && |
@@ -754,15 +743,20 @@ void intel_power_sequencer_reset(struct drm_i915_private *dev_priv) | |||
754 | * should use them always. | 743 | * should use them always. |
755 | */ | 744 | */ |
756 | 745 | ||
757 | for_each_intel_encoder(dev, encoder) { | 746 | for_each_intel_encoder(&dev_priv->drm, encoder) { |
758 | struct intel_dp *intel_dp; | 747 | struct intel_dp *intel_dp; |
759 | 748 | ||
760 | if (encoder->type != INTEL_OUTPUT_DP && | 749 | if (encoder->type != INTEL_OUTPUT_DP && |
761 | encoder->type != INTEL_OUTPUT_EDP) | 750 | encoder->type != INTEL_OUTPUT_EDP && |
751 | encoder->type != INTEL_OUTPUT_DDI) | ||
762 | continue; | 752 | continue; |
763 | 753 | ||
764 | intel_dp = enc_to_intel_dp(&encoder->base); | 754 | intel_dp = enc_to_intel_dp(&encoder->base); |
765 | 755 | ||
756 | /* Skip pure DVI/HDMI DDI encoders */ | ||
757 | if (!i915_mmio_reg_valid(intel_dp->output_reg)) | ||
758 | continue; | ||
759 | |||
766 | WARN_ON(intel_dp->active_pipe != INVALID_PIPE); | 760 | WARN_ON(intel_dp->active_pipe != INVALID_PIPE); |
767 | 761 | ||
768 | if (encoder->type != INTEL_OUTPUT_EDP) | 762 | if (encoder->type != INTEL_OUTPUT_EDP) |
@@ -783,10 +777,10 @@ struct pps_registers { | |||
783 | i915_reg_t pp_div; | 777 | i915_reg_t pp_div; |
784 | }; | 778 | }; |
785 | 779 | ||
786 | static void intel_pps_get_registers(struct drm_i915_private *dev_priv, | 780 | static void intel_pps_get_registers(struct intel_dp *intel_dp, |
787 | struct intel_dp *intel_dp, | ||
788 | struct pps_registers *regs) | 781 | struct pps_registers *regs) |
789 | { | 782 | { |
783 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
790 | int pps_idx = 0; | 784 | int pps_idx = 0; |
791 | 785 | ||
792 | memset(regs, 0, sizeof(*regs)); | 786 | memset(regs, 0, sizeof(*regs)); |
@@ -809,8 +803,7 @@ _pp_ctrl_reg(struct intel_dp *intel_dp) | |||
809 | { | 803 | { |
810 | struct pps_registers regs; | 804 | struct pps_registers regs; |
811 | 805 | ||
812 | intel_pps_get_registers(to_i915(intel_dp_to_dev(intel_dp)), intel_dp, | 806 | intel_pps_get_registers(intel_dp, ®s); |
813 | ®s); | ||
814 | 807 | ||
815 | return regs.pp_ctrl; | 808 | return regs.pp_ctrl; |
816 | } | 809 | } |
@@ -820,8 +813,7 @@ _pp_stat_reg(struct intel_dp *intel_dp) | |||
820 | { | 813 | { |
821 | struct pps_registers regs; | 814 | struct pps_registers regs; |
822 | 815 | ||
823 | intel_pps_get_registers(to_i915(intel_dp_to_dev(intel_dp)), intel_dp, | 816 | intel_pps_get_registers(intel_dp, ®s); |
824 | ®s); | ||
825 | 817 | ||
826 | return regs.pp_stat; | 818 | return regs.pp_stat; |
827 | } | 819 | } |
@@ -833,8 +825,7 @@ static int edp_notify_handler(struct notifier_block *this, unsigned long code, | |||
833 | { | 825 | { |
834 | struct intel_dp *intel_dp = container_of(this, typeof(* intel_dp), | 826 | struct intel_dp *intel_dp = container_of(this, typeof(* intel_dp), |
835 | edp_notifier); | 827 | edp_notifier); |
836 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 828 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
837 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
838 | 829 | ||
839 | if (!intel_dp_is_edp(intel_dp) || code != SYS_RESTART) | 830 | if (!intel_dp_is_edp(intel_dp) || code != SYS_RESTART) |
840 | return 0; | 831 | return 0; |
@@ -864,8 +855,7 @@ static int edp_notify_handler(struct notifier_block *this, unsigned long code, | |||
864 | 855 | ||
865 | static bool edp_have_panel_power(struct intel_dp *intel_dp) | 856 | static bool edp_have_panel_power(struct intel_dp *intel_dp) |
866 | { | 857 | { |
867 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 858 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
868 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
869 | 859 | ||
870 | lockdep_assert_held(&dev_priv->pps_mutex); | 860 | lockdep_assert_held(&dev_priv->pps_mutex); |
871 | 861 | ||
@@ -878,8 +868,7 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp) | |||
878 | 868 | ||
879 | static bool edp_have_panel_vdd(struct intel_dp *intel_dp) | 869 | static bool edp_have_panel_vdd(struct intel_dp *intel_dp) |
880 | { | 870 | { |
881 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 871 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
882 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
883 | 872 | ||
884 | lockdep_assert_held(&dev_priv->pps_mutex); | 873 | lockdep_assert_held(&dev_priv->pps_mutex); |
885 | 874 | ||
@@ -893,8 +882,7 @@ static bool edp_have_panel_vdd(struct intel_dp *intel_dp) | |||
893 | static void | 882 | static void |
894 | intel_dp_check_edp(struct intel_dp *intel_dp) | 883 | intel_dp_check_edp(struct intel_dp *intel_dp) |
895 | { | 884 | { |
896 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 885 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
897 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
898 | 886 | ||
899 | if (!intel_dp_is_edp(intel_dp)) | 887 | if (!intel_dp_is_edp(intel_dp)) |
900 | return; | 888 | return; |
@@ -910,9 +898,7 @@ intel_dp_check_edp(struct intel_dp *intel_dp) | |||
910 | static uint32_t | 898 | static uint32_t |
911 | intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq) | 899 | intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq) |
912 | { | 900 | { |
913 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 901 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
914 | struct drm_device *dev = intel_dig_port->base.base.dev; | ||
915 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
916 | i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg; | 902 | i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg; |
917 | uint32_t status; | 903 | uint32_t status; |
918 | bool done; | 904 | bool done; |
@@ -959,7 +945,7 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) | |||
959 | * like to run at 2MHz. So, take the cdclk or PCH rawclk value and | 945 | * like to run at 2MHz. So, take the cdclk or PCH rawclk value and |
960 | * divide by 2000 and use that | 946 | * divide by 2000 and use that |
961 | */ | 947 | */ |
962 | if (intel_dig_port->port == PORT_A) | 948 | if (intel_dig_port->base.port == PORT_A) |
963 | return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk, 2000); | 949 | return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk, 2000); |
964 | else | 950 | else |
965 | return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); | 951 | return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); |
@@ -970,7 +956,7 @@ static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) | |||
970 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 956 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
971 | struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); | 957 | struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); |
972 | 958 | ||
973 | if (intel_dig_port->port != PORT_A && HAS_PCH_LPT_H(dev_priv)) { | 959 | if (intel_dig_port->base.port != PORT_A && HAS_PCH_LPT_H(dev_priv)) { |
974 | /* Workaround for non-ULT HSW */ | 960 | /* Workaround for non-ULT HSW */ |
975 | switch (index) { | 961 | switch (index) { |
976 | case 0: return 63; | 962 | case 0: return 63; |
@@ -1440,7 +1426,7 @@ static void intel_aux_reg_init(struct intel_dp *intel_dp) | |||
1440 | { | 1426 | { |
1441 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | 1427 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
1442 | enum port port = intel_aux_port(dev_priv, | 1428 | enum port port = intel_aux_port(dev_priv, |
1443 | dp_to_dig_port(intel_dp)->port); | 1429 | dp_to_dig_port(intel_dp)->base.port); |
1444 | int i; | 1430 | int i; |
1445 | 1431 | ||
1446 | intel_dp->aux_ch_ctl_reg = intel_aux_ctl_reg(dev_priv, port); | 1432 | intel_dp->aux_ch_ctl_reg = intel_aux_ctl_reg(dev_priv, port); |
@@ -1458,7 +1444,7 @@ static void | |||
1458 | intel_dp_aux_init(struct intel_dp *intel_dp) | 1444 | intel_dp_aux_init(struct intel_dp *intel_dp) |
1459 | { | 1445 | { |
1460 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 1446 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
1461 | enum port port = intel_dig_port->port; | 1447 | enum port port = intel_dig_port->base.port; |
1462 | 1448 | ||
1463 | intel_aux_reg_init(intel_dp); | 1449 | intel_aux_reg_init(intel_dp); |
1464 | drm_dp_aux_init(&intel_dp->aux); | 1450 | drm_dp_aux_init(&intel_dp->aux); |
@@ -1479,8 +1465,7 @@ static void | |||
1479 | intel_dp_set_clock(struct intel_encoder *encoder, | 1465 | intel_dp_set_clock(struct intel_encoder *encoder, |
1480 | struct intel_crtc_state *pipe_config) | 1466 | struct intel_crtc_state *pipe_config) |
1481 | { | 1467 | { |
1482 | struct drm_device *dev = encoder->base.dev; | 1468 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
1483 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
1484 | const struct dp_link_dpll *divisor = NULL; | 1469 | const struct dp_link_dpll *divisor = NULL; |
1485 | int i, count = 0; | 1470 | int i, count = 0; |
1486 | 1471 | ||
@@ -1628,7 +1613,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, | |||
1628 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | 1613 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
1629 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; | 1614 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
1630 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 1615 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
1631 | enum port port = dp_to_dig_port(intel_dp)->port; | 1616 | enum port port = encoder->port; |
1632 | struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); | 1617 | struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); |
1633 | struct intel_connector *intel_connector = intel_dp->attached_connector; | 1618 | struct intel_connector *intel_connector = intel_dp->attached_connector; |
1634 | struct intel_digital_connector_state *intel_conn_state = | 1619 | struct intel_digital_connector_state *intel_conn_state = |
@@ -1849,11 +1834,10 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp, | |||
1849 | static void intel_dp_prepare(struct intel_encoder *encoder, | 1834 | static void intel_dp_prepare(struct intel_encoder *encoder, |
1850 | const struct intel_crtc_state *pipe_config) | 1835 | const struct intel_crtc_state *pipe_config) |
1851 | { | 1836 | { |
1852 | struct drm_device *dev = encoder->base.dev; | 1837 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
1853 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
1854 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 1838 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
1855 | enum port port = dp_to_dig_port(intel_dp)->port; | 1839 | enum port port = encoder->port; |
1856 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | 1840 | struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); |
1857 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; | 1841 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
1858 | 1842 | ||
1859 | intel_dp_set_link_params(intel_dp, pipe_config->port_clock, | 1843 | intel_dp_set_link_params(intel_dp, pipe_config->port_clock, |
@@ -1940,20 +1924,18 @@ static void intel_dp_prepare(struct intel_encoder *encoder, | |||
1940 | #define IDLE_CYCLE_MASK (PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK) | 1924 | #define IDLE_CYCLE_MASK (PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK) |
1941 | #define IDLE_CYCLE_VALUE (0 | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_OFF_IDLE) | 1925 | #define IDLE_CYCLE_VALUE (0 | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_OFF_IDLE) |
1942 | 1926 | ||
1943 | static void intel_pps_verify_state(struct drm_i915_private *dev_priv, | 1927 | static void intel_pps_verify_state(struct intel_dp *intel_dp); |
1944 | struct intel_dp *intel_dp); | ||
1945 | 1928 | ||
1946 | static void wait_panel_status(struct intel_dp *intel_dp, | 1929 | static void wait_panel_status(struct intel_dp *intel_dp, |
1947 | u32 mask, | 1930 | u32 mask, |
1948 | u32 value) | 1931 | u32 value) |
1949 | { | 1932 | { |
1950 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 1933 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
1951 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
1952 | i915_reg_t pp_stat_reg, pp_ctrl_reg; | 1934 | i915_reg_t pp_stat_reg, pp_ctrl_reg; |
1953 | 1935 | ||
1954 | lockdep_assert_held(&dev_priv->pps_mutex); | 1936 | lockdep_assert_held(&dev_priv->pps_mutex); |
1955 | 1937 | ||
1956 | intel_pps_verify_state(dev_priv, intel_dp); | 1938 | intel_pps_verify_state(intel_dp); |
1957 | 1939 | ||
1958 | pp_stat_reg = _pp_stat_reg(intel_dp); | 1940 | pp_stat_reg = _pp_stat_reg(intel_dp); |
1959 | pp_ctrl_reg = _pp_ctrl_reg(intel_dp); | 1941 | pp_ctrl_reg = _pp_ctrl_reg(intel_dp); |
@@ -2024,8 +2006,7 @@ static void edp_wait_backlight_off(struct intel_dp *intel_dp) | |||
2024 | 2006 | ||
2025 | static u32 ironlake_get_pp_control(struct intel_dp *intel_dp) | 2007 | static u32 ironlake_get_pp_control(struct intel_dp *intel_dp) |
2026 | { | 2008 | { |
2027 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 2009 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
2028 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2029 | u32 control; | 2010 | u32 control; |
2030 | 2011 | ||
2031 | lockdep_assert_held(&dev_priv->pps_mutex); | 2012 | lockdep_assert_held(&dev_priv->pps_mutex); |
@@ -2046,9 +2027,8 @@ static u32 ironlake_get_pp_control(struct intel_dp *intel_dp) | |||
2046 | */ | 2027 | */ |
2047 | static bool edp_panel_vdd_on(struct intel_dp *intel_dp) | 2028 | static bool edp_panel_vdd_on(struct intel_dp *intel_dp) |
2048 | { | 2029 | { |
2049 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 2030 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
2050 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 2031 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
2051 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2052 | u32 pp; | 2032 | u32 pp; |
2053 | i915_reg_t pp_stat_reg, pp_ctrl_reg; | 2033 | i915_reg_t pp_stat_reg, pp_ctrl_reg; |
2054 | bool need_to_disable = !intel_dp->want_panel_vdd; | 2034 | bool need_to_disable = !intel_dp->want_panel_vdd; |
@@ -2067,7 +2047,7 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp) | |||
2067 | intel_display_power_get(dev_priv, intel_dp->aux_power_domain); | 2047 | intel_display_power_get(dev_priv, intel_dp->aux_power_domain); |
2068 | 2048 | ||
2069 | DRM_DEBUG_KMS("Turning eDP port %c VDD on\n", | 2049 | DRM_DEBUG_KMS("Turning eDP port %c VDD on\n", |
2070 | port_name(intel_dig_port->port)); | 2050 | port_name(intel_dig_port->base.port)); |
2071 | 2051 | ||
2072 | if (!edp_have_panel_power(intel_dp)) | 2052 | if (!edp_have_panel_power(intel_dp)) |
2073 | wait_panel_power_cycle(intel_dp); | 2053 | wait_panel_power_cycle(intel_dp); |
@@ -2087,7 +2067,7 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp) | |||
2087 | */ | 2067 | */ |
2088 | if (!edp_have_panel_power(intel_dp)) { | 2068 | if (!edp_have_panel_power(intel_dp)) { |
2089 | DRM_DEBUG_KMS("eDP port %c panel power wasn't enabled\n", | 2069 | DRM_DEBUG_KMS("eDP port %c panel power wasn't enabled\n", |
2090 | port_name(intel_dig_port->port)); | 2070 | port_name(intel_dig_port->base.port)); |
2091 | msleep(intel_dp->panel_power_up_delay); | 2071 | msleep(intel_dp->panel_power_up_delay); |
2092 | } | 2072 | } |
2093 | 2073 | ||
@@ -2113,13 +2093,12 @@ void intel_edp_panel_vdd_on(struct intel_dp *intel_dp) | |||
2113 | pps_unlock(intel_dp); | 2093 | pps_unlock(intel_dp); |
2114 | 2094 | ||
2115 | I915_STATE_WARN(!vdd, "eDP port %c VDD already requested on\n", | 2095 | I915_STATE_WARN(!vdd, "eDP port %c VDD already requested on\n", |
2116 | port_name(dp_to_dig_port(intel_dp)->port)); | 2096 | port_name(dp_to_dig_port(intel_dp)->base.port)); |
2117 | } | 2097 | } |
2118 | 2098 | ||
2119 | static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp) | 2099 | static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp) |
2120 | { | 2100 | { |
2121 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 2101 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
2122 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2123 | struct intel_digital_port *intel_dig_port = | 2102 | struct intel_digital_port *intel_dig_port = |
2124 | dp_to_dig_port(intel_dp); | 2103 | dp_to_dig_port(intel_dp); |
2125 | u32 pp; | 2104 | u32 pp; |
@@ -2133,7 +2112,7 @@ static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp) | |||
2133 | return; | 2112 | return; |
2134 | 2113 | ||
2135 | DRM_DEBUG_KMS("Turning eDP port %c VDD off\n", | 2114 | DRM_DEBUG_KMS("Turning eDP port %c VDD off\n", |
2136 | port_name(intel_dig_port->port)); | 2115 | port_name(intel_dig_port->base.port)); |
2137 | 2116 | ||
2138 | pp = ironlake_get_pp_control(intel_dp); | 2117 | pp = ironlake_get_pp_control(intel_dp); |
2139 | pp &= ~EDP_FORCE_VDD; | 2118 | pp &= ~EDP_FORCE_VDD; |
@@ -2193,7 +2172,7 @@ static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) | |||
2193 | return; | 2172 | return; |
2194 | 2173 | ||
2195 | I915_STATE_WARN(!intel_dp->want_panel_vdd, "eDP port %c VDD not forced on", | 2174 | I915_STATE_WARN(!intel_dp->want_panel_vdd, "eDP port %c VDD not forced on", |
2196 | port_name(dp_to_dig_port(intel_dp)->port)); | 2175 | port_name(dp_to_dig_port(intel_dp)->base.port)); |
2197 | 2176 | ||
2198 | intel_dp->want_panel_vdd = false; | 2177 | intel_dp->want_panel_vdd = false; |
2199 | 2178 | ||
@@ -2205,8 +2184,7 @@ static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) | |||
2205 | 2184 | ||
2206 | static void edp_panel_on(struct intel_dp *intel_dp) | 2185 | static void edp_panel_on(struct intel_dp *intel_dp) |
2207 | { | 2186 | { |
2208 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 2187 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
2209 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2210 | u32 pp; | 2188 | u32 pp; |
2211 | i915_reg_t pp_ctrl_reg; | 2189 | i915_reg_t pp_ctrl_reg; |
2212 | 2190 | ||
@@ -2216,11 +2194,11 @@ static void edp_panel_on(struct intel_dp *intel_dp) | |||
2216 | return; | 2194 | return; |
2217 | 2195 | ||
2218 | DRM_DEBUG_KMS("Turn eDP port %c panel power on\n", | 2196 | DRM_DEBUG_KMS("Turn eDP port %c panel power on\n", |
2219 | port_name(dp_to_dig_port(intel_dp)->port)); | 2197 | port_name(dp_to_dig_port(intel_dp)->base.port)); |
2220 | 2198 | ||
2221 | if (WARN(edp_have_panel_power(intel_dp), | 2199 | if (WARN(edp_have_panel_power(intel_dp), |
2222 | "eDP port %c panel power already on\n", | 2200 | "eDP port %c panel power already on\n", |
2223 | port_name(dp_to_dig_port(intel_dp)->port))) | 2201 | port_name(dp_to_dig_port(intel_dp)->base.port))) |
2224 | return; | 2202 | return; |
2225 | 2203 | ||
2226 | wait_panel_power_cycle(intel_dp); | 2204 | wait_panel_power_cycle(intel_dp); |
@@ -2264,8 +2242,7 @@ void intel_edp_panel_on(struct intel_dp *intel_dp) | |||
2264 | 2242 | ||
2265 | static void edp_panel_off(struct intel_dp *intel_dp) | 2243 | static void edp_panel_off(struct intel_dp *intel_dp) |
2266 | { | 2244 | { |
2267 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 2245 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
2268 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2269 | u32 pp; | 2246 | u32 pp; |
2270 | i915_reg_t pp_ctrl_reg; | 2247 | i915_reg_t pp_ctrl_reg; |
2271 | 2248 | ||
@@ -2275,10 +2252,10 @@ static void edp_panel_off(struct intel_dp *intel_dp) | |||
2275 | return; | 2252 | return; |
2276 | 2253 | ||
2277 | DRM_DEBUG_KMS("Turn eDP port %c panel power off\n", | 2254 | DRM_DEBUG_KMS("Turn eDP port %c panel power off\n", |
2278 | port_name(dp_to_dig_port(intel_dp)->port)); | 2255 | port_name(dp_to_dig_port(intel_dp)->base.port)); |
2279 | 2256 | ||
2280 | WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n", | 2257 | WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n", |
2281 | port_name(dp_to_dig_port(intel_dp)->port)); | 2258 | port_name(dp_to_dig_port(intel_dp)->base.port)); |
2282 | 2259 | ||
2283 | pp = ironlake_get_pp_control(intel_dp); | 2260 | pp = ironlake_get_pp_control(intel_dp); |
2284 | /* We need to switch off panel power _and_ force vdd, for otherwise some | 2261 | /* We need to switch off panel power _and_ force vdd, for otherwise some |
@@ -2313,9 +2290,7 @@ void intel_edp_panel_off(struct intel_dp *intel_dp) | |||
2313 | /* Enable backlight in the panel power control. */ | 2290 | /* Enable backlight in the panel power control. */ |
2314 | static void _intel_edp_backlight_on(struct intel_dp *intel_dp) | 2291 | static void _intel_edp_backlight_on(struct intel_dp *intel_dp) |
2315 | { | 2292 | { |
2316 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 2293 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
2317 | struct drm_device *dev = intel_dig_port->base.base.dev; | ||
2318 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2319 | u32 pp; | 2294 | u32 pp; |
2320 | i915_reg_t pp_ctrl_reg; | 2295 | i915_reg_t pp_ctrl_reg; |
2321 | 2296 | ||
@@ -2358,8 +2333,7 @@ void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state, | |||
2358 | /* Disable backlight in the panel power control. */ | 2333 | /* Disable backlight in the panel power control. */ |
2359 | static void _intel_edp_backlight_off(struct intel_dp *intel_dp) | 2334 | static void _intel_edp_backlight_off(struct intel_dp *intel_dp) |
2360 | { | 2335 | { |
2361 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 2336 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
2362 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2363 | u32 pp; | 2337 | u32 pp; |
2364 | i915_reg_t pp_ctrl_reg; | 2338 | i915_reg_t pp_ctrl_reg; |
2365 | 2339 | ||
@@ -2430,7 +2404,7 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool state) | |||
2430 | 2404 | ||
2431 | I915_STATE_WARN(cur_state != state, | 2405 | I915_STATE_WARN(cur_state != state, |
2432 | "DP port %c state assertion failure (expected %s, current %s)\n", | 2406 | "DP port %c state assertion failure (expected %s, current %s)\n", |
2433 | port_name(dig_port->port), | 2407 | port_name(dig_port->base.port), |
2434 | onoff(state), onoff(cur_state)); | 2408 | onoff(state), onoff(cur_state)); |
2435 | } | 2409 | } |
2436 | #define assert_dp_port_disabled(d) assert_dp_port((d), false) | 2410 | #define assert_dp_port_disabled(d) assert_dp_port((d), false) |
@@ -2486,10 +2460,10 @@ static void ironlake_edp_pll_on(struct intel_dp *intel_dp, | |||
2486 | udelay(200); | 2460 | udelay(200); |
2487 | } | 2461 | } |
2488 | 2462 | ||
2489 | static void ironlake_edp_pll_off(struct intel_dp *intel_dp) | 2463 | static void ironlake_edp_pll_off(struct intel_dp *intel_dp, |
2464 | const struct intel_crtc_state *old_crtc_state) | ||
2490 | { | 2465 | { |
2491 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 2466 | struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); |
2492 | struct intel_crtc *crtc = to_intel_crtc(intel_dig_port->base.base.crtc); | ||
2493 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); | 2467 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
2494 | 2468 | ||
2495 | assert_pipe_disabled(dev_priv, crtc->pipe); | 2469 | assert_pipe_disabled(dev_priv, crtc->pipe); |
@@ -2505,6 +2479,21 @@ static void ironlake_edp_pll_off(struct intel_dp *intel_dp) | |||
2505 | udelay(200); | 2479 | udelay(200); |
2506 | } | 2480 | } |
2507 | 2481 | ||
2482 | static bool downstream_hpd_needs_d0(struct intel_dp *intel_dp) | ||
2483 | { | ||
2484 | /* | ||
2485 | * DPCD 1.2+ should support BRANCH_DEVICE_CTRL, and thus | ||
2486 | * be capable of signalling downstream hpd with a long pulse. | ||
2487 | * Whether or not that means D3 is safe to use is not clear, | ||
2488 | * but let's assume so until proven otherwise. | ||
2489 | * | ||
2490 | * FIXME should really check all downstream ports... | ||
2491 | */ | ||
2492 | return intel_dp->dpcd[DP_DPCD_REV] == 0x11 && | ||
2493 | intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT && | ||
2494 | intel_dp->downstream_ports[0] & DP_DS_PORT_HPD; | ||
2495 | } | ||
2496 | |||
2508 | /* If the sink supports it, try to set the power state appropriately */ | 2497 | /* If the sink supports it, try to set the power state appropriately */ |
2509 | void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) | 2498 | void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) |
2510 | { | 2499 | { |
@@ -2515,6 +2504,9 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) | |||
2515 | return; | 2504 | return; |
2516 | 2505 | ||
2517 | if (mode != DRM_MODE_DPMS_ON) { | 2506 | if (mode != DRM_MODE_DPMS_ON) { |
2507 | if (downstream_hpd_needs_d0(intel_dp)) | ||
2508 | return; | ||
2509 | |||
2518 | ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, | 2510 | ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, |
2519 | DP_SET_POWER_D3); | 2511 | DP_SET_POWER_D3); |
2520 | } else { | 2512 | } else { |
@@ -2544,10 +2536,9 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) | |||
2544 | static bool intel_dp_get_hw_state(struct intel_encoder *encoder, | 2536 | static bool intel_dp_get_hw_state(struct intel_encoder *encoder, |
2545 | enum pipe *pipe) | 2537 | enum pipe *pipe) |
2546 | { | 2538 | { |
2539 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | ||
2547 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 2540 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
2548 | enum port port = dp_to_dig_port(intel_dp)->port; | 2541 | enum port port = encoder->port; |
2549 | struct drm_device *dev = encoder->base.dev; | ||
2550 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2551 | u32 tmp; | 2542 | u32 tmp; |
2552 | bool ret; | 2543 | bool ret; |
2553 | 2544 | ||
@@ -2596,12 +2587,16 @@ out: | |||
2596 | static void intel_dp_get_config(struct intel_encoder *encoder, | 2587 | static void intel_dp_get_config(struct intel_encoder *encoder, |
2597 | struct intel_crtc_state *pipe_config) | 2588 | struct intel_crtc_state *pipe_config) |
2598 | { | 2589 | { |
2590 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | ||
2599 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 2591 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
2600 | u32 tmp, flags = 0; | 2592 | u32 tmp, flags = 0; |
2601 | struct drm_device *dev = encoder->base.dev; | 2593 | enum port port = encoder->port; |
2602 | struct drm_i915_private *dev_priv = to_i915(dev); | 2594 | struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); |
2603 | enum port port = dp_to_dig_port(intel_dp)->port; | 2595 | |
2604 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | 2596 | if (encoder->type == INTEL_OUTPUT_EDP) |
2597 | pipe_config->output_types |= BIT(INTEL_OUTPUT_EDP); | ||
2598 | else | ||
2599 | pipe_config->output_types |= BIT(INTEL_OUTPUT_DP); | ||
2605 | 2600 | ||
2606 | tmp = I915_READ(intel_dp->output_reg); | 2601 | tmp = I915_READ(intel_dp->output_reg); |
2607 | 2602 | ||
@@ -2680,7 +2675,8 @@ static void intel_disable_dp(struct intel_encoder *encoder, | |||
2680 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 2675 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
2681 | 2676 | ||
2682 | if (old_crtc_state->has_audio) | 2677 | if (old_crtc_state->has_audio) |
2683 | intel_audio_codec_disable(encoder); | 2678 | intel_audio_codec_disable(encoder, |
2679 | old_crtc_state, old_conn_state); | ||
2684 | 2680 | ||
2685 | /* Make sure the panel is off before trying to change the mode. But also | 2681 | /* Make sure the panel is off before trying to change the mode. But also |
2686 | * ensure that we have vdd while we switch off the panel. */ | 2682 | * ensure that we have vdd while we switch off the panel. */ |
@@ -2694,12 +2690,10 @@ static void g4x_disable_dp(struct intel_encoder *encoder, | |||
2694 | const struct intel_crtc_state *old_crtc_state, | 2690 | const struct intel_crtc_state *old_crtc_state, |
2695 | const struct drm_connector_state *old_conn_state) | 2691 | const struct drm_connector_state *old_conn_state) |
2696 | { | 2692 | { |
2697 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | ||
2698 | |||
2699 | intel_disable_dp(encoder, old_crtc_state, old_conn_state); | 2693 | intel_disable_dp(encoder, old_crtc_state, old_conn_state); |
2700 | 2694 | ||
2701 | /* disable the port before the pipe on g4x */ | 2695 | /* disable the port before the pipe on g4x */ |
2702 | intel_dp_link_down(intel_dp); | 2696 | intel_dp_link_down(encoder, old_crtc_state); |
2703 | } | 2697 | } |
2704 | 2698 | ||
2705 | static void ilk_disable_dp(struct intel_encoder *encoder, | 2699 | static void ilk_disable_dp(struct intel_encoder *encoder, |
@@ -2725,38 +2719,34 @@ static void ilk_post_disable_dp(struct intel_encoder *encoder, | |||
2725 | const struct drm_connector_state *old_conn_state) | 2719 | const struct drm_connector_state *old_conn_state) |
2726 | { | 2720 | { |
2727 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 2721 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
2728 | enum port port = dp_to_dig_port(intel_dp)->port; | 2722 | enum port port = encoder->port; |
2729 | 2723 | ||
2730 | intel_dp_link_down(intel_dp); | 2724 | intel_dp_link_down(encoder, old_crtc_state); |
2731 | 2725 | ||
2732 | /* Only ilk+ has port A */ | 2726 | /* Only ilk+ has port A */ |
2733 | if (port == PORT_A) | 2727 | if (port == PORT_A) |
2734 | ironlake_edp_pll_off(intel_dp); | 2728 | ironlake_edp_pll_off(intel_dp, old_crtc_state); |
2735 | } | 2729 | } |
2736 | 2730 | ||
2737 | static void vlv_post_disable_dp(struct intel_encoder *encoder, | 2731 | static void vlv_post_disable_dp(struct intel_encoder *encoder, |
2738 | const struct intel_crtc_state *old_crtc_state, | 2732 | const struct intel_crtc_state *old_crtc_state, |
2739 | const struct drm_connector_state *old_conn_state) | 2733 | const struct drm_connector_state *old_conn_state) |
2740 | { | 2734 | { |
2741 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 2735 | intel_dp_link_down(encoder, old_crtc_state); |
2742 | |||
2743 | intel_dp_link_down(intel_dp); | ||
2744 | } | 2736 | } |
2745 | 2737 | ||
2746 | static void chv_post_disable_dp(struct intel_encoder *encoder, | 2738 | static void chv_post_disable_dp(struct intel_encoder *encoder, |
2747 | const struct intel_crtc_state *old_crtc_state, | 2739 | const struct intel_crtc_state *old_crtc_state, |
2748 | const struct drm_connector_state *old_conn_state) | 2740 | const struct drm_connector_state *old_conn_state) |
2749 | { | 2741 | { |
2750 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 2742 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
2751 | struct drm_device *dev = encoder->base.dev; | ||
2752 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2753 | 2743 | ||
2754 | intel_dp_link_down(intel_dp); | 2744 | intel_dp_link_down(encoder, old_crtc_state); |
2755 | 2745 | ||
2756 | mutex_lock(&dev_priv->sb_lock); | 2746 | mutex_lock(&dev_priv->sb_lock); |
2757 | 2747 | ||
2758 | /* Assert data lane reset */ | 2748 | /* Assert data lane reset */ |
2759 | chv_data_lane_soft_reset(encoder, true); | 2749 | chv_data_lane_soft_reset(encoder, old_crtc_state, true); |
2760 | 2750 | ||
2761 | mutex_unlock(&dev_priv->sb_lock); | 2751 | mutex_unlock(&dev_priv->sb_lock); |
2762 | } | 2752 | } |
@@ -2766,10 +2756,9 @@ _intel_dp_set_link_train(struct intel_dp *intel_dp, | |||
2766 | uint32_t *DP, | 2756 | uint32_t *DP, |
2767 | uint8_t dp_train_pat) | 2757 | uint8_t dp_train_pat) |
2768 | { | 2758 | { |
2759 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
2769 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 2760 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
2770 | struct drm_device *dev = intel_dig_port->base.base.dev; | 2761 | enum port port = intel_dig_port->base.port; |
2771 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2772 | enum port port = intel_dig_port->port; | ||
2773 | 2762 | ||
2774 | if (dp_train_pat & DP_TRAINING_PATTERN_MASK) | 2763 | if (dp_train_pat & DP_TRAINING_PATTERN_MASK) |
2775 | DRM_DEBUG_KMS("Using DP training pattern TPS%d\n", | 2764 | DRM_DEBUG_KMS("Using DP training pattern TPS%d\n", |
@@ -2852,8 +2841,7 @@ _intel_dp_set_link_train(struct intel_dp *intel_dp, | |||
2852 | static void intel_dp_enable_port(struct intel_dp *intel_dp, | 2841 | static void intel_dp_enable_port(struct intel_dp *intel_dp, |
2853 | const struct intel_crtc_state *old_crtc_state) | 2842 | const struct intel_crtc_state *old_crtc_state) |
2854 | { | 2843 | { |
2855 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 2844 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
2856 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2857 | 2845 | ||
2858 | /* enable with pattern 1 (as per spec) */ | 2846 | /* enable with pattern 1 (as per spec) */ |
2859 | 2847 | ||
@@ -2877,10 +2865,9 @@ static void intel_enable_dp(struct intel_encoder *encoder, | |||
2877 | const struct intel_crtc_state *pipe_config, | 2865 | const struct intel_crtc_state *pipe_config, |
2878 | const struct drm_connector_state *conn_state) | 2866 | const struct drm_connector_state *conn_state) |
2879 | { | 2867 | { |
2868 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | ||
2880 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 2869 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
2881 | struct drm_device *dev = encoder->base.dev; | 2870 | struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); |
2882 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2883 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | ||
2884 | uint32_t dp_reg = I915_READ(intel_dp->output_reg); | 2871 | uint32_t dp_reg = I915_READ(intel_dp->output_reg); |
2885 | enum pipe pipe = crtc->pipe; | 2872 | enum pipe pipe = crtc->pipe; |
2886 | 2873 | ||
@@ -2890,7 +2877,7 @@ static void intel_enable_dp(struct intel_encoder *encoder, | |||
2890 | pps_lock(intel_dp); | 2877 | pps_lock(intel_dp); |
2891 | 2878 | ||
2892 | if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) | 2879 | if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) |
2893 | vlv_init_panel_power_sequencer(intel_dp); | 2880 | vlv_init_panel_power_sequencer(encoder, pipe_config); |
2894 | 2881 | ||
2895 | intel_dp_enable_port(intel_dp, pipe_config); | 2882 | intel_dp_enable_port(intel_dp, pipe_config); |
2896 | 2883 | ||
@@ -2944,7 +2931,7 @@ static void g4x_pre_enable_dp(struct intel_encoder *encoder, | |||
2944 | const struct drm_connector_state *conn_state) | 2931 | const struct drm_connector_state *conn_state) |
2945 | { | 2932 | { |
2946 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); | 2933 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
2947 | enum port port = dp_to_dig_port(intel_dp)->port; | 2934 | enum port port = encoder->port; |
2948 | 2935 | ||
2949 | intel_dp_prepare(encoder, pipe_config); | 2936 | intel_dp_prepare(encoder, pipe_config); |
2950 | 2937 | ||
@@ -2977,22 +2964,21 @@ static void vlv_detach_power_sequencer(struct intel_dp *intel_dp) | |||
2977 | * from a port. | 2964 | * from a port. |
2978 | */ | 2965 | */ |
2979 | DRM_DEBUG_KMS("detaching pipe %c power sequencer from port %c\n", | 2966 | DRM_DEBUG_KMS("detaching pipe %c power sequencer from port %c\n", |
2980 | pipe_name(pipe), port_name(intel_dig_port->port)); | 2967 | pipe_name(pipe), port_name(intel_dig_port->base.port)); |
2981 | I915_WRITE(pp_on_reg, 0); | 2968 | I915_WRITE(pp_on_reg, 0); |
2982 | POSTING_READ(pp_on_reg); | 2969 | POSTING_READ(pp_on_reg); |
2983 | 2970 | ||
2984 | intel_dp->pps_pipe = INVALID_PIPE; | 2971 | intel_dp->pps_pipe = INVALID_PIPE; |
2985 | } | 2972 | } |
2986 | 2973 | ||
2987 | static void vlv_steal_power_sequencer(struct drm_device *dev, | 2974 | static void vlv_steal_power_sequencer(struct drm_i915_private *dev_priv, |
2988 | enum pipe pipe) | 2975 | enum pipe pipe) |
2989 | { | 2976 | { |
2990 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
2991 | struct intel_encoder *encoder; | 2977 | struct intel_encoder *encoder; |
2992 | 2978 | ||
2993 | lockdep_assert_held(&dev_priv->pps_mutex); | 2979 | lockdep_assert_held(&dev_priv->pps_mutex); |
2994 | 2980 | ||
2995 | for_each_intel_encoder(dev, encoder) { | 2981 | for_each_intel_encoder(&dev_priv->drm, encoder) { |
2996 | struct intel_dp *intel_dp; | 2982 | struct intel_dp *intel_dp; |
2997 | enum port port; | 2983 | enum port port; |
2998 | 2984 | ||
@@ -3001,7 +2987,7 @@ static void vlv_steal_power_sequencer(struct drm_device *dev, | |||
3001 | continue; | 2987 | continue; |
3002 | 2988 | ||
3003 | intel_dp = enc_to_intel_dp(&encoder->base); | 2989 | intel_dp = enc_to_intel_dp(&encoder->base); |
3004 | port = dp_to_dig_port(intel_dp)->port; | 2990 | port = dp_to_dig_port(intel_dp)->base.port; |
3005 | 2991 | ||
3006 | WARN(intel_dp->active_pipe == pipe, | 2992 | WARN(intel_dp->active_pipe == pipe, |
3007 | "stealing pipe %c power sequencer from active (e)DP port %c\n", | 2993 | "stealing pipe %c power sequencer from active (e)DP port %c\n", |
@@ -3018,13 +3004,12 @@ static void vlv_steal_power_sequencer(struct drm_device *dev, | |||
3018 | } | 3004 | } |
3019 | } | 3005 | } |
3020 | 3006 | ||
3021 | static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp) | 3007 | static void vlv_init_panel_power_sequencer(struct intel_encoder *encoder, |
3008 | const struct intel_crtc_state *crtc_state) | ||
3022 | { | 3009 | { |
3023 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 3010 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
3024 | struct intel_encoder *encoder = &intel_dig_port->base; | 3011 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
3025 | struct drm_device *dev = encoder->base.dev; | 3012 | struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); |
3026 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
3027 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | ||
3028 | 3013 | ||
3029 | lockdep_assert_held(&dev_priv->pps_mutex); | 3014 | lockdep_assert_held(&dev_priv->pps_mutex); |
3030 | 3015 | ||
@@ -3044,7 +3029,7 @@ static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp) | |||
3044 | * We may be stealing the power | 3029 | * We may be stealing the power |
3045 | * sequencer from another port. | 3030 | * sequencer from another port. |
3046 | */ | 3031 | */ |
3047 | vlv_steal_power_sequencer(dev, crtc->pipe); | 3032 | vlv_steal_power_sequencer(dev_priv, crtc->pipe); |
3048 | 3033 | ||
3049 | intel_dp->active_pipe = crtc->pipe; | 3034 | intel_dp->active_pipe = crtc->pipe; |
3050 | 3035 | ||
@@ -3055,18 +3040,18 @@ static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp) | |||
3055 | intel_dp->pps_pipe = crtc->pipe; | 3040 | intel_dp->pps_pipe = crtc->pipe; |
3056 | 3041 | ||
3057 | DRM_DEBUG_KMS("initializing pipe %c power sequencer for port %c\n", | 3042 | DRM_DEBUG_KMS("initializing pipe %c power sequencer for port %c\n", |
3058 | pipe_name(intel_dp->pps_pipe), port_name(intel_dig_port->port)); | 3043 | pipe_name(intel_dp->pps_pipe), port_name(encoder->port)); |
3059 | 3044 | ||
3060 | /* init power sequencer on this pipe and port */ | 3045 | /* init power sequencer on this pipe and port */ |
3061 | intel_dp_init_panel_power_sequencer(dev, intel_dp); | 3046 | intel_dp_init_panel_power_sequencer(intel_dp); |
3062 | intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, true); | 3047 | intel_dp_init_panel_power_sequencer_registers(intel_dp, true); |
3063 | } | 3048 | } |
3064 | 3049 | ||
3065 | static void vlv_pre_enable_dp(struct intel_encoder *encoder, | 3050 | static void vlv_pre_enable_dp(struct intel_encoder *encoder, |
3066 | const struct intel_crtc_state *pipe_config, | 3051 | const struct intel_crtc_state *pipe_config, |
3067 | const struct drm_connector_state *conn_state) | 3052 | const struct drm_connector_state *conn_state) |
3068 | { | 3053 | { |
3069 | vlv_phy_pre_encoder_enable(encoder); | 3054 | vlv_phy_pre_encoder_enable(encoder, pipe_config); |
3070 | 3055 | ||
3071 | intel_enable_dp(encoder, pipe_config, conn_state); | 3056 | intel_enable_dp(encoder, pipe_config, conn_state); |
3072 | } | 3057 | } |
@@ -3077,14 +3062,14 @@ static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder, | |||
3077 | { | 3062 | { |
3078 | intel_dp_prepare(encoder, pipe_config); | 3063 | intel_dp_prepare(encoder, pipe_config); |
3079 | 3064 | ||
3080 | vlv_phy_pre_pll_enable(encoder); | 3065 | vlv_phy_pre_pll_enable(encoder, pipe_config); |
3081 | } | 3066 | } |
3082 | 3067 | ||
3083 | static void chv_pre_enable_dp(struct intel_encoder *encoder, | 3068 | static void chv_pre_enable_dp(struct intel_encoder *encoder, |
3084 | const struct intel_crtc_state *pipe_config, | 3069 | const struct intel_crtc_state *pipe_config, |
3085 | const struct drm_connector_state *conn_state) | 3070 | const struct drm_connector_state *conn_state) |
3086 | { | 3071 | { |
3087 | chv_phy_pre_encoder_enable(encoder); | 3072 | chv_phy_pre_encoder_enable(encoder, pipe_config); |
3088 | 3073 | ||
3089 | intel_enable_dp(encoder, pipe_config, conn_state); | 3074 | intel_enable_dp(encoder, pipe_config, conn_state); |
3090 | 3075 | ||
@@ -3098,14 +3083,14 @@ static void chv_dp_pre_pll_enable(struct intel_encoder *encoder, | |||
3098 | { | 3083 | { |
3099 | intel_dp_prepare(encoder, pipe_config); | 3084 | intel_dp_prepare(encoder, pipe_config); |
3100 | 3085 | ||
3101 | chv_phy_pre_pll_enable(encoder); | 3086 | chv_phy_pre_pll_enable(encoder, pipe_config); |
3102 | } | 3087 | } |
3103 | 3088 | ||
3104 | static void chv_dp_post_pll_disable(struct intel_encoder *encoder, | 3089 | static void chv_dp_post_pll_disable(struct intel_encoder *encoder, |
3105 | const struct intel_crtc_state *pipe_config, | 3090 | const struct intel_crtc_state *old_crtc_state, |
3106 | const struct drm_connector_state *conn_state) | 3091 | const struct drm_connector_state *old_conn_state) |
3107 | { | 3092 | { |
3108 | chv_phy_post_pll_disable(encoder); | 3093 | chv_phy_post_pll_disable(encoder, old_crtc_state); |
3109 | } | 3094 | } |
3110 | 3095 | ||
3111 | /* | 3096 | /* |
@@ -3153,7 +3138,7 @@ uint8_t | |||
3153 | intel_dp_voltage_max(struct intel_dp *intel_dp) | 3138 | intel_dp_voltage_max(struct intel_dp *intel_dp) |
3154 | { | 3139 | { |
3155 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | 3140 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
3156 | enum port port = dp_to_dig_port(intel_dp)->port; | 3141 | enum port port = dp_to_dig_port(intel_dp)->base.port; |
3157 | 3142 | ||
3158 | if (INTEL_GEN(dev_priv) >= 9) { | 3143 | if (INTEL_GEN(dev_priv) >= 9) { |
3159 | struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; | 3144 | struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; |
@@ -3172,7 +3157,7 @@ uint8_t | |||
3172 | intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing) | 3157 | intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing) |
3173 | { | 3158 | { |
3174 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | 3159 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
3175 | enum port port = dp_to_dig_port(intel_dp)->port; | 3160 | enum port port = dp_to_dig_port(intel_dp)->base.port; |
3176 | 3161 | ||
3177 | if (INTEL_GEN(dev_priv) >= 9) { | 3162 | if (INTEL_GEN(dev_priv) >= 9) { |
3178 | switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) { | 3163 | switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) { |
@@ -3505,10 +3490,9 @@ gen7_edp_signal_levels(uint8_t train_set) | |||
3505 | void | 3490 | void |
3506 | intel_dp_set_signal_levels(struct intel_dp *intel_dp) | 3491 | intel_dp_set_signal_levels(struct intel_dp *intel_dp) |
3507 | { | 3492 | { |
3493 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
3508 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 3494 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
3509 | enum port port = intel_dig_port->port; | 3495 | enum port port = intel_dig_port->base.port; |
3510 | struct drm_device *dev = intel_dig_port->base.base.dev; | ||
3511 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
3512 | uint32_t signal_levels, mask = 0; | 3496 | uint32_t signal_levels, mask = 0; |
3513 | uint8_t train_set = intel_dp->train_set[0]; | 3497 | uint8_t train_set = intel_dp->train_set[0]; |
3514 | 3498 | ||
@@ -3563,10 +3547,9 @@ intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, | |||
3563 | 3547 | ||
3564 | void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) | 3548 | void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) |
3565 | { | 3549 | { |
3550 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
3566 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 3551 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
3567 | struct drm_device *dev = intel_dig_port->base.base.dev; | 3552 | enum port port = intel_dig_port->base.port; |
3568 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
3569 | enum port port = intel_dig_port->port; | ||
3570 | uint32_t val; | 3553 | uint32_t val; |
3571 | 3554 | ||
3572 | if (!HAS_DDI(dev_priv)) | 3555 | if (!HAS_DDI(dev_priv)) |
@@ -3595,13 +3578,13 @@ void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) | |||
3595 | } | 3578 | } |
3596 | 3579 | ||
3597 | static void | 3580 | static void |
3598 | intel_dp_link_down(struct intel_dp *intel_dp) | 3581 | intel_dp_link_down(struct intel_encoder *encoder, |
3582 | const struct intel_crtc_state *old_crtc_state) | ||
3599 | { | 3583 | { |
3600 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 3584 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
3601 | struct intel_crtc *crtc = to_intel_crtc(intel_dig_port->base.base.crtc); | 3585 | struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); |
3602 | enum port port = intel_dig_port->port; | 3586 | struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); |
3603 | struct drm_device *dev = intel_dig_port->base.base.dev; | 3587 | enum port port = encoder->port; |
3604 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
3605 | uint32_t DP = intel_dp->DP; | 3588 | uint32_t DP = intel_dp->DP; |
3606 | 3589 | ||
3607 | if (WARN_ON(HAS_DDI(dev_priv))) | 3590 | if (WARN_ON(HAS_DDI(dev_priv))) |
@@ -3747,11 +3730,11 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) | |||
3747 | if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV, | 3730 | if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV, |
3748 | intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) == | 3731 | intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) == |
3749 | sizeof(intel_dp->edp_dpcd)) | 3732 | sizeof(intel_dp->edp_dpcd)) |
3750 | DRM_DEBUG_KMS("EDP DPCD : %*ph\n", (int) sizeof(intel_dp->edp_dpcd), | 3733 | DRM_DEBUG_KMS("eDP DPCD: %*ph\n", (int) sizeof(intel_dp->edp_dpcd), |
3751 | intel_dp->edp_dpcd); | 3734 | intel_dp->edp_dpcd); |
3752 | 3735 | ||
3753 | /* Intermediate frequency support */ | 3736 | /* Read the eDP 1.4+ supported link rates. */ |
3754 | if (intel_dp->edp_dpcd[0] >= 0x03) { /* eDp v1.4 or higher */ | 3737 | if (intel_dp->edp_dpcd[0] >= DP_EDP_14) { |
3755 | __le16 sink_rates[DP_MAX_SUPPORTED_RATES]; | 3738 | __le16 sink_rates[DP_MAX_SUPPORTED_RATES]; |
3756 | int i; | 3739 | int i; |
3757 | 3740 | ||
@@ -3775,6 +3758,10 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) | |||
3775 | intel_dp->num_sink_rates = i; | 3758 | intel_dp->num_sink_rates = i; |
3776 | } | 3759 | } |
3777 | 3760 | ||
3761 | /* | ||
3762 | * Use DP_LINK_RATE_SET if DP_SUPPORTED_LINK_RATES are available, | ||
3763 | * default to DP_MAX_LINK_RATE and DP_LINK_BW_SET otherwise. | ||
3764 | */ | ||
3778 | if (intel_dp->num_sink_rates) | 3765 | if (intel_dp->num_sink_rates) |
3779 | intel_dp->use_rate_select = true; | 3766 | intel_dp->use_rate_select = true; |
3780 | else | 3767 | else |
@@ -3874,11 +3861,12 @@ intel_dp_configure_mst(struct intel_dp *intel_dp) | |||
3874 | intel_dp->is_mst); | 3861 | intel_dp->is_mst); |
3875 | } | 3862 | } |
3876 | 3863 | ||
3877 | static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp) | 3864 | static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp, |
3865 | struct intel_crtc_state *crtc_state, bool disable_wa) | ||
3878 | { | 3866 | { |
3879 | struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); | 3867 | struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); |
3880 | struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); | 3868 | struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); |
3881 | struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc); | 3869 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); |
3882 | u8 buf; | 3870 | u8 buf; |
3883 | int ret = 0; | 3871 | int ret = 0; |
3884 | int count = 0; | 3872 | int count = 0; |
@@ -3914,15 +3902,17 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp) | |||
3914 | } | 3902 | } |
3915 | 3903 | ||
3916 | out: | 3904 | out: |
3917 | hsw_enable_ips(intel_crtc); | 3905 | if (disable_wa) |
3906 | hsw_enable_ips(crtc_state); | ||
3918 | return ret; | 3907 | return ret; |
3919 | } | 3908 | } |
3920 | 3909 | ||
3921 | static int intel_dp_sink_crc_start(struct intel_dp *intel_dp) | 3910 | static int intel_dp_sink_crc_start(struct intel_dp *intel_dp, |
3911 | struct intel_crtc_state *crtc_state) | ||
3922 | { | 3912 | { |
3923 | struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); | 3913 | struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); |
3924 | struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); | 3914 | struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); |
3925 | struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc); | 3915 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); |
3926 | u8 buf; | 3916 | u8 buf; |
3927 | int ret; | 3917 | int ret; |
3928 | 3918 | ||
@@ -3936,16 +3926,16 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp) | |||
3936 | return -EIO; | 3926 | return -EIO; |
3937 | 3927 | ||
3938 | if (buf & DP_TEST_SINK_START) { | 3928 | if (buf & DP_TEST_SINK_START) { |
3939 | ret = intel_dp_sink_crc_stop(intel_dp); | 3929 | ret = intel_dp_sink_crc_stop(intel_dp, crtc_state, false); |
3940 | if (ret) | 3930 | if (ret) |
3941 | return ret; | 3931 | return ret; |
3942 | } | 3932 | } |
3943 | 3933 | ||
3944 | hsw_disable_ips(intel_crtc); | 3934 | hsw_disable_ips(crtc_state); |
3945 | 3935 | ||
3946 | if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, | 3936 | if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, |
3947 | buf | DP_TEST_SINK_START) < 0) { | 3937 | buf | DP_TEST_SINK_START) < 0) { |
3948 | hsw_enable_ips(intel_crtc); | 3938 | hsw_enable_ips(crtc_state); |
3949 | return -EIO; | 3939 | return -EIO; |
3950 | } | 3940 | } |
3951 | 3941 | ||
@@ -3953,16 +3943,16 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp) | |||
3953 | return 0; | 3943 | return 0; |
3954 | } | 3944 | } |
3955 | 3945 | ||
3956 | int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) | 3946 | int intel_dp_sink_crc(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, u8 *crc) |
3957 | { | 3947 | { |
3958 | struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); | 3948 | struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); |
3959 | struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); | 3949 | struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); |
3960 | struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc); | 3950 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); |
3961 | u8 buf; | 3951 | u8 buf; |
3962 | int count, ret; | 3952 | int count, ret; |
3963 | int attempts = 6; | 3953 | int attempts = 6; |
3964 | 3954 | ||
3965 | ret = intel_dp_sink_crc_start(intel_dp); | 3955 | ret = intel_dp_sink_crc_start(intel_dp, crtc_state); |
3966 | if (ret) | 3956 | if (ret) |
3967 | return ret; | 3957 | return ret; |
3968 | 3958 | ||
@@ -3990,7 +3980,7 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) | |||
3990 | } | 3980 | } |
3991 | 3981 | ||
3992 | stop: | 3982 | stop: |
3993 | intel_dp_sink_crc_stop(intel_dp); | 3983 | intel_dp_sink_crc_stop(intel_dp, crtc_state, true); |
3994 | return ret; | 3984 | return ret; |
3995 | } | 3985 | } |
3996 | 3986 | ||
@@ -4285,11 +4275,11 @@ intel_dp_retrain_link(struct intel_dp *intel_dp) | |||
4285 | static void | 4275 | static void |
4286 | intel_dp_check_link_status(struct intel_dp *intel_dp) | 4276 | intel_dp_check_link_status(struct intel_dp *intel_dp) |
4287 | { | 4277 | { |
4278 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
4288 | struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; | 4279 | struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; |
4289 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | ||
4290 | u8 link_status[DP_LINK_STATUS_SIZE]; | 4280 | u8 link_status[DP_LINK_STATUS_SIZE]; |
4291 | 4281 | ||
4292 | WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); | 4282 | WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex)); |
4293 | 4283 | ||
4294 | if (!intel_dp_get_link_status(intel_dp, link_status)) { | 4284 | if (!intel_dp_get_link_status(intel_dp, link_status)) { |
4295 | DRM_ERROR("Failed to get link status\n"); | 4285 | DRM_ERROR("Failed to get link status\n"); |
@@ -4335,8 +4325,7 @@ intel_dp_check_link_status(struct intel_dp *intel_dp) | |||
4335 | static bool | 4325 | static bool |
4336 | intel_dp_short_pulse(struct intel_dp *intel_dp) | 4326 | intel_dp_short_pulse(struct intel_dp *intel_dp) |
4337 | { | 4327 | { |
4338 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 4328 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
4339 | struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; | ||
4340 | u8 sink_irq_vector = 0; | 4329 | u8 sink_irq_vector = 0; |
4341 | u8 old_sink_count = intel_dp->sink_count; | 4330 | u8 old_sink_count = intel_dp->sink_count; |
4342 | bool ret; | 4331 | bool ret; |
@@ -4375,13 +4364,13 @@ intel_dp_short_pulse(struct intel_dp *intel_dp) | |||
4375 | DRM_DEBUG_DRIVER("CP or sink specific irq unhandled\n"); | 4364 | DRM_DEBUG_DRIVER("CP or sink specific irq unhandled\n"); |
4376 | } | 4365 | } |
4377 | 4366 | ||
4378 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); | 4367 | drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex, NULL); |
4379 | intel_dp_check_link_status(intel_dp); | 4368 | intel_dp_check_link_status(intel_dp); |
4380 | drm_modeset_unlock(&dev->mode_config.connection_mutex); | 4369 | drm_modeset_unlock(&dev_priv->drm.mode_config.connection_mutex); |
4381 | if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) { | 4370 | if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) { |
4382 | DRM_DEBUG_KMS("Link Training Compliance Test requested\n"); | 4371 | DRM_DEBUG_KMS("Link Training Compliance Test requested\n"); |
4383 | /* Send a Hotplug Uevent to userspace to start modeset */ | 4372 | /* Send a Hotplug Uevent to userspace to start modeset */ |
4384 | drm_kms_helper_hotplug_event(intel_encoder->base.dev); | 4373 | drm_kms_helper_hotplug_event(&dev_priv->drm); |
4385 | } | 4374 | } |
4386 | 4375 | ||
4387 | return true; | 4376 | return true; |
@@ -4445,8 +4434,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) | |||
4445 | static enum drm_connector_status | 4434 | static enum drm_connector_status |
4446 | edp_detect(struct intel_dp *intel_dp) | 4435 | edp_detect(struct intel_dp *intel_dp) |
4447 | { | 4436 | { |
4448 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 4437 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
4449 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
4450 | enum drm_connector_status status; | 4438 | enum drm_connector_status status; |
4451 | 4439 | ||
4452 | status = intel_panel_detect(dev_priv); | 4440 | status = intel_panel_detect(dev_priv); |
@@ -4461,7 +4449,7 @@ static bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4461 | { | 4449 | { |
4462 | u32 bit; | 4450 | u32 bit; |
4463 | 4451 | ||
4464 | switch (port->port) { | 4452 | switch (port->base.port) { |
4465 | case PORT_B: | 4453 | case PORT_B: |
4466 | bit = SDE_PORTB_HOTPLUG; | 4454 | bit = SDE_PORTB_HOTPLUG; |
4467 | break; | 4455 | break; |
@@ -4472,7 +4460,7 @@ static bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4472 | bit = SDE_PORTD_HOTPLUG; | 4460 | bit = SDE_PORTD_HOTPLUG; |
4473 | break; | 4461 | break; |
4474 | default: | 4462 | default: |
4475 | MISSING_CASE(port->port); | 4463 | MISSING_CASE(port->base.port); |
4476 | return false; | 4464 | return false; |
4477 | } | 4465 | } |
4478 | 4466 | ||
@@ -4484,7 +4472,7 @@ static bool cpt_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4484 | { | 4472 | { |
4485 | u32 bit; | 4473 | u32 bit; |
4486 | 4474 | ||
4487 | switch (port->port) { | 4475 | switch (port->base.port) { |
4488 | case PORT_B: | 4476 | case PORT_B: |
4489 | bit = SDE_PORTB_HOTPLUG_CPT; | 4477 | bit = SDE_PORTB_HOTPLUG_CPT; |
4490 | break; | 4478 | break; |
@@ -4495,7 +4483,7 @@ static bool cpt_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4495 | bit = SDE_PORTD_HOTPLUG_CPT; | 4483 | bit = SDE_PORTD_HOTPLUG_CPT; |
4496 | break; | 4484 | break; |
4497 | default: | 4485 | default: |
4498 | MISSING_CASE(port->port); | 4486 | MISSING_CASE(port->base.port); |
4499 | return false; | 4487 | return false; |
4500 | } | 4488 | } |
4501 | 4489 | ||
@@ -4507,7 +4495,7 @@ static bool spt_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4507 | { | 4495 | { |
4508 | u32 bit; | 4496 | u32 bit; |
4509 | 4497 | ||
4510 | switch (port->port) { | 4498 | switch (port->base.port) { |
4511 | case PORT_A: | 4499 | case PORT_A: |
4512 | bit = SDE_PORTA_HOTPLUG_SPT; | 4500 | bit = SDE_PORTA_HOTPLUG_SPT; |
4513 | break; | 4501 | break; |
@@ -4526,7 +4514,7 @@ static bool g4x_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4526 | { | 4514 | { |
4527 | u32 bit; | 4515 | u32 bit; |
4528 | 4516 | ||
4529 | switch (port->port) { | 4517 | switch (port->base.port) { |
4530 | case PORT_B: | 4518 | case PORT_B: |
4531 | bit = PORTB_HOTPLUG_LIVE_STATUS_G4X; | 4519 | bit = PORTB_HOTPLUG_LIVE_STATUS_G4X; |
4532 | break; | 4520 | break; |
@@ -4537,7 +4525,7 @@ static bool g4x_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4537 | bit = PORTD_HOTPLUG_LIVE_STATUS_G4X; | 4525 | bit = PORTD_HOTPLUG_LIVE_STATUS_G4X; |
4538 | break; | 4526 | break; |
4539 | default: | 4527 | default: |
4540 | MISSING_CASE(port->port); | 4528 | MISSING_CASE(port->base.port); |
4541 | return false; | 4529 | return false; |
4542 | } | 4530 | } |
4543 | 4531 | ||
@@ -4549,7 +4537,7 @@ static bool gm45_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4549 | { | 4537 | { |
4550 | u32 bit; | 4538 | u32 bit; |
4551 | 4539 | ||
4552 | switch (port->port) { | 4540 | switch (port->base.port) { |
4553 | case PORT_B: | 4541 | case PORT_B: |
4554 | bit = PORTB_HOTPLUG_LIVE_STATUS_GM45; | 4542 | bit = PORTB_HOTPLUG_LIVE_STATUS_GM45; |
4555 | break; | 4543 | break; |
@@ -4560,7 +4548,7 @@ static bool gm45_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4560 | bit = PORTD_HOTPLUG_LIVE_STATUS_GM45; | 4548 | bit = PORTD_HOTPLUG_LIVE_STATUS_GM45; |
4561 | break; | 4549 | break; |
4562 | default: | 4550 | default: |
4563 | MISSING_CASE(port->port); | 4551 | MISSING_CASE(port->base.port); |
4564 | return false; | 4552 | return false; |
4565 | } | 4553 | } |
4566 | 4554 | ||
@@ -4570,7 +4558,7 @@ static bool gm45_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4570 | static bool ilk_digital_port_connected(struct drm_i915_private *dev_priv, | 4558 | static bool ilk_digital_port_connected(struct drm_i915_private *dev_priv, |
4571 | struct intel_digital_port *port) | 4559 | struct intel_digital_port *port) |
4572 | { | 4560 | { |
4573 | if (port->port == PORT_A) | 4561 | if (port->base.port == PORT_A) |
4574 | return I915_READ(DEISR) & DE_DP_A_HOTPLUG; | 4562 | return I915_READ(DEISR) & DE_DP_A_HOTPLUG; |
4575 | else | 4563 | else |
4576 | return ibx_digital_port_connected(dev_priv, port); | 4564 | return ibx_digital_port_connected(dev_priv, port); |
@@ -4579,7 +4567,7 @@ static bool ilk_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4579 | static bool snb_digital_port_connected(struct drm_i915_private *dev_priv, | 4567 | static bool snb_digital_port_connected(struct drm_i915_private *dev_priv, |
4580 | struct intel_digital_port *port) | 4568 | struct intel_digital_port *port) |
4581 | { | 4569 | { |
4582 | if (port->port == PORT_A) | 4570 | if (port->base.port == PORT_A) |
4583 | return I915_READ(DEISR) & DE_DP_A_HOTPLUG; | 4571 | return I915_READ(DEISR) & DE_DP_A_HOTPLUG; |
4584 | else | 4572 | else |
4585 | return cpt_digital_port_connected(dev_priv, port); | 4573 | return cpt_digital_port_connected(dev_priv, port); |
@@ -4588,7 +4576,7 @@ static bool snb_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4588 | static bool ivb_digital_port_connected(struct drm_i915_private *dev_priv, | 4576 | static bool ivb_digital_port_connected(struct drm_i915_private *dev_priv, |
4589 | struct intel_digital_port *port) | 4577 | struct intel_digital_port *port) |
4590 | { | 4578 | { |
4591 | if (port->port == PORT_A) | 4579 | if (port->base.port == PORT_A) |
4592 | return I915_READ(DEISR) & DE_DP_A_HOTPLUG_IVB; | 4580 | return I915_READ(DEISR) & DE_DP_A_HOTPLUG_IVB; |
4593 | else | 4581 | else |
4594 | return cpt_digital_port_connected(dev_priv, port); | 4582 | return cpt_digital_port_connected(dev_priv, port); |
@@ -4597,7 +4585,7 @@ static bool ivb_digital_port_connected(struct drm_i915_private *dev_priv, | |||
4597 | static bool bdw_digital_port_connected(struct drm_i915_private *dev_priv, | 4585 | static bool bdw_digital_port_connected(struct drm_i915_private *dev_priv, |
4598 | struct intel_digital_port *port) | 4586 | struct intel_digital_port *port) |
4599 | { | 4587 | { |
4600 | if (port->port == PORT_A) | 4588 | if (port->base.port == PORT_A) |
4601 | return I915_READ(GEN8_DE_PORT_ISR) & GEN8_PORT_DP_A_HOTPLUG; | 4589 | return I915_READ(GEN8_DE_PORT_ISR) & GEN8_PORT_DP_A_HOTPLUG; |
4602 | else | 4590 | else |
4603 | return cpt_digital_port_connected(dev_priv, port); | 4591 | return cpt_digital_port_connected(dev_priv, port); |
@@ -4702,24 +4690,21 @@ intel_dp_unset_edid(struct intel_dp *intel_dp) | |||
4702 | } | 4690 | } |
4703 | 4691 | ||
4704 | static int | 4692 | static int |
4705 | intel_dp_long_pulse(struct intel_connector *intel_connector) | 4693 | intel_dp_long_pulse(struct intel_connector *connector) |
4706 | { | 4694 | { |
4707 | struct drm_connector *connector = &intel_connector->base; | 4695 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
4708 | struct intel_dp *intel_dp = intel_attached_dp(connector); | 4696 | struct intel_dp *intel_dp = intel_attached_dp(&connector->base); |
4709 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | ||
4710 | struct intel_encoder *intel_encoder = &intel_dig_port->base; | ||
4711 | struct drm_device *dev = connector->dev; | ||
4712 | enum drm_connector_status status; | 4697 | enum drm_connector_status status; |
4713 | u8 sink_irq_vector = 0; | 4698 | u8 sink_irq_vector = 0; |
4714 | 4699 | ||
4715 | WARN_ON(!drm_modeset_is_locked(&connector->dev->mode_config.connection_mutex)); | 4700 | WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex)); |
4716 | 4701 | ||
4717 | intel_display_power_get(to_i915(dev), intel_dp->aux_power_domain); | 4702 | intel_display_power_get(dev_priv, intel_dp->aux_power_domain); |
4718 | 4703 | ||
4719 | /* Can't disconnect eDP, but you can close the lid... */ | 4704 | /* Can't disconnect eDP, but you can close the lid... */ |
4720 | if (intel_dp_is_edp(intel_dp)) | 4705 | if (intel_dp_is_edp(intel_dp)) |
4721 | status = edp_detect(intel_dp); | 4706 | status = edp_detect(intel_dp); |
4722 | else if (intel_digital_port_connected(to_i915(dev), | 4707 | else if (intel_digital_port_connected(dev_priv, |
4723 | dp_to_dig_port(intel_dp))) | 4708 | dp_to_dig_port(intel_dp))) |
4724 | status = intel_dp_detect_dpcd(intel_dp); | 4709 | status = intel_dp_detect_dpcd(intel_dp); |
4725 | else | 4710 | else |
@@ -4740,9 +4725,6 @@ intel_dp_long_pulse(struct intel_connector *intel_connector) | |||
4740 | goto out; | 4725 | goto out; |
4741 | } | 4726 | } |
4742 | 4727 | ||
4743 | if (intel_encoder->type != INTEL_OUTPUT_EDP) | ||
4744 | intel_encoder->type = INTEL_OUTPUT_DP; | ||
4745 | |||
4746 | if (intel_dp->reset_link_params) { | 4728 | if (intel_dp->reset_link_params) { |
4747 | /* Initial max link lane count */ | 4729 | /* Initial max link lane count */ |
4748 | intel_dp->max_link_lane_count = intel_dp_max_common_lane_count(intel_dp); | 4730 | intel_dp->max_link_lane_count = intel_dp_max_common_lane_count(intel_dp); |
@@ -4793,7 +4775,7 @@ intel_dp_long_pulse(struct intel_connector *intel_connector) | |||
4793 | intel_dp->aux.i2c_defer_count = 0; | 4775 | intel_dp->aux.i2c_defer_count = 0; |
4794 | 4776 | ||
4795 | intel_dp_set_edid(intel_dp); | 4777 | intel_dp_set_edid(intel_dp); |
4796 | if (intel_dp_is_edp(intel_dp) || intel_connector->detect_edid) | 4778 | if (intel_dp_is_edp(intel_dp) || connector->detect_edid) |
4797 | status = connector_status_connected; | 4779 | status = connector_status_connected; |
4798 | intel_dp->detect_done = true; | 4780 | intel_dp->detect_done = true; |
4799 | 4781 | ||
@@ -4816,7 +4798,7 @@ out: | |||
4816 | if (status != connector_status_connected && !intel_dp->is_mst) | 4798 | if (status != connector_status_connected && !intel_dp->is_mst) |
4817 | intel_dp_unset_edid(intel_dp); | 4799 | intel_dp_unset_edid(intel_dp); |
4818 | 4800 | ||
4819 | intel_display_power_put(to_i915(dev), intel_dp->aux_power_domain); | 4801 | intel_display_power_put(dev_priv, intel_dp->aux_power_domain); |
4820 | return status; | 4802 | return status; |
4821 | } | 4803 | } |
4822 | 4804 | ||
@@ -4859,9 +4841,6 @@ intel_dp_force(struct drm_connector *connector) | |||
4859 | intel_dp_set_edid(intel_dp); | 4841 | intel_dp_set_edid(intel_dp); |
4860 | 4842 | ||
4861 | intel_display_power_put(dev_priv, intel_dp->aux_power_domain); | 4843 | intel_display_power_put(dev_priv, intel_dp->aux_power_domain); |
4862 | |||
4863 | if (intel_encoder->type != INTEL_OUTPUT_EDP) | ||
4864 | intel_encoder->type = INTEL_OUTPUT_DP; | ||
4865 | } | 4844 | } |
4866 | 4845 | ||
4867 | static int intel_dp_get_modes(struct drm_connector *connector) | 4846 | static int intel_dp_get_modes(struct drm_connector *connector) |
@@ -4986,9 +4965,7 @@ void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder) | |||
4986 | 4965 | ||
4987 | static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) | 4966 | static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) |
4988 | { | 4967 | { |
4989 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | 4968 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
4990 | struct drm_device *dev = intel_dig_port->base.base.dev; | ||
4991 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
4992 | 4969 | ||
4993 | lockdep_assert_held(&dev_priv->pps_mutex); | 4970 | lockdep_assert_held(&dev_priv->pps_mutex); |
4994 | 4971 | ||
@@ -5041,7 +5018,7 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder) | |||
5041 | 5018 | ||
5042 | if (intel_dp_is_edp(intel_dp)) { | 5019 | if (intel_dp_is_edp(intel_dp)) { |
5043 | /* Reinit the power sequencer, in case BIOS did something with it. */ | 5020 | /* Reinit the power sequencer, in case BIOS did something with it. */ |
5044 | intel_dp_pps_init(encoder->dev, intel_dp); | 5021 | intel_dp_pps_init(intel_dp); |
5045 | intel_edp_panel_vdd_sanitize(intel_dp); | 5022 | intel_edp_panel_vdd_sanitize(intel_dp); |
5046 | } | 5023 | } |
5047 | 5024 | ||
@@ -5076,14 +5053,9 @@ enum irqreturn | |||
5076 | intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) | 5053 | intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) |
5077 | { | 5054 | { |
5078 | struct intel_dp *intel_dp = &intel_dig_port->dp; | 5055 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
5079 | struct drm_device *dev = intel_dig_port->base.base.dev; | 5056 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
5080 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
5081 | enum irqreturn ret = IRQ_NONE; | 5057 | enum irqreturn ret = IRQ_NONE; |
5082 | 5058 | ||
5083 | if (intel_dig_port->base.type != INTEL_OUTPUT_EDP && | ||
5084 | intel_dig_port->base.type != INTEL_OUTPUT_HDMI) | ||
5085 | intel_dig_port->base.type = INTEL_OUTPUT_DP; | ||
5086 | |||
5087 | if (long_hpd && intel_dig_port->base.type == INTEL_OUTPUT_EDP) { | 5059 | if (long_hpd && intel_dig_port->base.type == INTEL_OUTPUT_EDP) { |
5088 | /* | 5060 | /* |
5089 | * vdd off can generate a long pulse on eDP which | 5061 | * vdd off can generate a long pulse on eDP which |
@@ -5092,12 +5064,12 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) | |||
5092 | * "vdd off -> long hpd -> vdd on -> detect -> vdd off -> ..." | 5064 | * "vdd off -> long hpd -> vdd on -> detect -> vdd off -> ..." |
5093 | */ | 5065 | */ |
5094 | DRM_DEBUG_KMS("ignoring long hpd on eDP port %c\n", | 5066 | DRM_DEBUG_KMS("ignoring long hpd on eDP port %c\n", |
5095 | port_name(intel_dig_port->port)); | 5067 | port_name(intel_dig_port->base.port)); |
5096 | return IRQ_HANDLED; | 5068 | return IRQ_HANDLED; |
5097 | } | 5069 | } |
5098 | 5070 | ||
5099 | DRM_DEBUG_KMS("got hpd irq on port %c - %s\n", | 5071 | DRM_DEBUG_KMS("got hpd irq on port %c - %s\n", |
5100 | port_name(intel_dig_port->port), | 5072 | port_name(intel_dig_port->base.port), |
5101 | long_hpd ? "long" : "short"); | 5073 | long_hpd ? "long" : "short"); |
5102 | 5074 | ||
5103 | if (long_hpd) { | 5075 | if (long_hpd) { |
@@ -5185,13 +5157,13 @@ static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp) | |||
5185 | } | 5157 | } |
5186 | 5158 | ||
5187 | static void | 5159 | static void |
5188 | intel_pps_readout_hw_state(struct drm_i915_private *dev_priv, | 5160 | intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq) |
5189 | struct intel_dp *intel_dp, struct edp_power_seq *seq) | ||
5190 | { | 5161 | { |
5162 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); | ||
5191 | u32 pp_on, pp_off, pp_div = 0, pp_ctl = 0; | 5163 | u32 pp_on, pp_off, pp_div = 0, pp_ctl = 0; |
5192 | struct pps_registers regs; | 5164 | struct pps_registers regs; |
5193 | 5165 | ||
5194 | intel_pps_get_registers(dev_priv, intel_dp, ®s); | 5166 | intel_pps_get_registers(intel_dp, ®s); |
5195 | 5167 | ||
5196 | /* Workaround: Need to write PP_CONTROL with the unlock key as | 5168 | /* Workaround: Need to write PP_CONTROL with the unlock key as |
5197 | * the very first thing. */ | 5169 | * the very first thing. */ |
@@ -5235,13 +5207,12 @@ intel_pps_dump_state(const char *state_name, const struct edp_power_seq *seq) | |||
5235 | } | 5207 | } |
5236 | 5208 | ||
5237 | static void | 5209 | static void |
5238 | intel_pps_verify_state(struct drm_i915_private *dev_priv, | 5210 | intel_pps_verify_state(struct intel_dp *intel_dp) |
5239 | struct intel_dp *intel_dp) | ||
5240 | { | 5211 | { |
5241 | struct edp_power_seq hw; | 5212 | struct edp_power_seq hw; |
5242 | struct edp_power_seq *sw = &intel_dp->pps_delays; | 5213 | struct edp_power_seq *sw = &intel_dp->pps_delays; |
5243 | 5214 | ||
5244 | intel_pps_readout_hw_state(dev_priv, intel_dp, &hw); | 5215 | intel_pps_readout_hw_state(intel_dp, &hw); |
5245 | 5216 | ||
5246 | if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 || | 5217 | if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 || |
5247 | hw.t10 != sw->t10 || hw.t11_t12 != sw->t11_t12) { | 5218 | hw.t10 != sw->t10 || hw.t11_t12 != sw->t11_t12) { |
@@ -5252,10 +5223,9 @@ intel_pps_verify_state(struct drm_i915_private *dev_priv, | |||
5252 | } | 5223 | } |
5253 | 5224 | ||
5254 | static void | 5225 | static void |
5255 | intel_dp_init_panel_power_sequencer(struct drm_device *dev, | 5226 | intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp) |
5256 | struct intel_dp *intel_dp) | ||
5257 | { | 5227 | { |
5258 | struct drm_i915_private *dev_priv = to_i915(dev); | 5228 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
5259 | struct edp_power_seq cur, vbt, spec, | 5229 | struct edp_power_seq cur, vbt, spec, |
5260 | *final = &intel_dp->pps_delays; | 5230 | *final = &intel_dp->pps_delays; |
5261 | 5231 | ||
@@ -5265,7 +5235,7 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, | |||
5265 | if (final->t11_t12 != 0) | 5235 | if (final->t11_t12 != 0) |
5266 | return; | 5236 | return; |
5267 | 5237 | ||
5268 | intel_pps_readout_hw_state(dev_priv, intel_dp, &cur); | 5238 | intel_pps_readout_hw_state(intel_dp, &cur); |
5269 | 5239 | ||
5270 | intel_pps_dump_state("cur", &cur); | 5240 | intel_pps_dump_state("cur", &cur); |
5271 | 5241 | ||
@@ -5339,20 +5309,19 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, | |||
5339 | } | 5309 | } |
5340 | 5310 | ||
5341 | static void | 5311 | static void |
5342 | intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev, | 5312 | intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, |
5343 | struct intel_dp *intel_dp, | ||
5344 | bool force_disable_vdd) | 5313 | bool force_disable_vdd) |
5345 | { | 5314 | { |
5346 | struct drm_i915_private *dev_priv = to_i915(dev); | 5315 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
5347 | u32 pp_on, pp_off, pp_div, port_sel = 0; | 5316 | u32 pp_on, pp_off, pp_div, port_sel = 0; |
5348 | int div = dev_priv->rawclk_freq / 1000; | 5317 | int div = dev_priv->rawclk_freq / 1000; |
5349 | struct pps_registers regs; | 5318 | struct pps_registers regs; |
5350 | enum port port = dp_to_dig_port(intel_dp)->port; | 5319 | enum port port = dp_to_dig_port(intel_dp)->base.port; |
5351 | const struct edp_power_seq *seq = &intel_dp->pps_delays; | 5320 | const struct edp_power_seq *seq = &intel_dp->pps_delays; |
5352 | 5321 | ||
5353 | lockdep_assert_held(&dev_priv->pps_mutex); | 5322 | lockdep_assert_held(&dev_priv->pps_mutex); |
5354 | 5323 | ||
5355 | intel_pps_get_registers(dev_priv, intel_dp, ®s); | 5324 | intel_pps_get_registers(intel_dp, ®s); |
5356 | 5325 | ||
5357 | /* | 5326 | /* |
5358 | * On some VLV machines the BIOS can leave the VDD | 5327 | * On some VLV machines the BIOS can leave the VDD |
@@ -5424,16 +5393,15 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev, | |||
5424 | I915_READ(regs.pp_div)); | 5393 | I915_READ(regs.pp_div)); |
5425 | } | 5394 | } |
5426 | 5395 | ||
5427 | static void intel_dp_pps_init(struct drm_device *dev, | 5396 | static void intel_dp_pps_init(struct intel_dp *intel_dp) |
5428 | struct intel_dp *intel_dp) | ||
5429 | { | 5397 | { |
5430 | struct drm_i915_private *dev_priv = to_i915(dev); | 5398 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
5431 | 5399 | ||
5432 | if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { | 5400 | if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { |
5433 | vlv_initial_power_sequencer_setup(intel_dp); | 5401 | vlv_initial_power_sequencer_setup(intel_dp); |
5434 | } else { | 5402 | } else { |
5435 | intel_dp_init_panel_power_sequencer(dev, intel_dp); | 5403 | intel_dp_init_panel_power_sequencer(intel_dp); |
5436 | intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, false); | 5404 | intel_dp_init_panel_power_sequencer_registers(intel_dp, false); |
5437 | } | 5405 | } |
5438 | } | 5406 | } |
5439 | 5407 | ||
@@ -5472,7 +5440,6 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv, | |||
5472 | 5440 | ||
5473 | dig_port = dp_to_dig_port(intel_dp); | 5441 | dig_port = dp_to_dig_port(intel_dp); |
5474 | encoder = &dig_port->base; | 5442 | encoder = &dig_port->base; |
5475 | intel_crtc = to_intel_crtc(encoder->base.crtc); | ||
5476 | 5443 | ||
5477 | if (!intel_crtc) { | 5444 | if (!intel_crtc) { |
5478 | DRM_DEBUG_KMS("DRRS: intel_crtc not initialized\n"); | 5445 | DRM_DEBUG_KMS("DRRS: intel_crtc not initialized\n"); |
@@ -5545,8 +5512,7 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv, | |||
5545 | void intel_edp_drrs_enable(struct intel_dp *intel_dp, | 5512 | void intel_edp_drrs_enable(struct intel_dp *intel_dp, |
5546 | const struct intel_crtc_state *crtc_state) | 5513 | const struct intel_crtc_state *crtc_state) |
5547 | { | 5514 | { |
5548 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 5515 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
5549 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
5550 | 5516 | ||
5551 | if (!crtc_state->has_drrs) { | 5517 | if (!crtc_state->has_drrs) { |
5552 | DRM_DEBUG_KMS("Panel doesn't support DRRS\n"); | 5518 | DRM_DEBUG_KMS("Panel doesn't support DRRS\n"); |
@@ -5581,8 +5547,7 @@ unlock: | |||
5581 | void intel_edp_drrs_disable(struct intel_dp *intel_dp, | 5547 | void intel_edp_drrs_disable(struct intel_dp *intel_dp, |
5582 | const struct intel_crtc_state *old_crtc_state) | 5548 | const struct intel_crtc_state *old_crtc_state) |
5583 | { | 5549 | { |
5584 | struct drm_device *dev = intel_dp_to_dev(intel_dp); | 5550 | struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); |
5585 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
5586 | 5551 | ||
5587 | if (!old_crtc_state->has_drrs) | 5552 | if (!old_crtc_state->has_drrs) |
5588 | return; | 5553 | return; |
@@ -5765,7 +5730,7 @@ void intel_edp_drrs_flush(struct drm_i915_private *dev_priv, | |||
5765 | 5730 | ||
5766 | /** | 5731 | /** |
5767 | * intel_dp_drrs_init - Init basic DRRS work and mutex. | 5732 | * intel_dp_drrs_init - Init basic DRRS work and mutex. |
5768 | * @intel_connector: eDP connector | 5733 | * @connector: eDP connector |
5769 | * @fixed_mode: preferred mode of panel | 5734 | * @fixed_mode: preferred mode of panel |
5770 | * | 5735 | * |
5771 | * This function is called only once at driver load to initialize basic | 5736 | * This function is called only once at driver load to initialize basic |
@@ -5777,12 +5742,10 @@ void intel_edp_drrs_flush(struct drm_i915_private *dev_priv, | |||
5777 | * from VBT setting). | 5742 | * from VBT setting). |
5778 | */ | 5743 | */ |
5779 | static struct drm_display_mode * | 5744 | static struct drm_display_mode * |
5780 | intel_dp_drrs_init(struct intel_connector *intel_connector, | 5745 | intel_dp_drrs_init(struct intel_connector *connector, |
5781 | struct drm_display_mode *fixed_mode) | 5746 | struct drm_display_mode *fixed_mode) |
5782 | { | 5747 | { |
5783 | struct drm_connector *connector = &intel_connector->base; | 5748 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
5784 | struct drm_device *dev = connector->dev; | ||
5785 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
5786 | struct drm_display_mode *downclock_mode = NULL; | 5749 | struct drm_display_mode *downclock_mode = NULL; |
5787 | 5750 | ||
5788 | INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_edp_drrs_downclock_work); | 5751 | INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_edp_drrs_downclock_work); |
@@ -5798,8 +5761,8 @@ intel_dp_drrs_init(struct intel_connector *intel_connector, | |||
5798 | return NULL; | 5761 | return NULL; |
5799 | } | 5762 | } |
5800 | 5763 | ||
5801 | downclock_mode = intel_find_panel_downclock | 5764 | downclock_mode = intel_find_panel_downclock(dev_priv, fixed_mode, |
5802 | (dev_priv, fixed_mode, connector); | 5765 | &connector->base); |
5803 | 5766 | ||
5804 | if (!downclock_mode) { | 5767 | if (!downclock_mode) { |
5805 | DRM_DEBUG_KMS("Downclock mode is not found. DRRS not supported\n"); | 5768 | DRM_DEBUG_KMS("Downclock mode is not found. DRRS not supported\n"); |
@@ -5816,11 +5779,9 @@ intel_dp_drrs_init(struct intel_connector *intel_connector, | |||
5816 | static bool intel_edp_init_connector(struct intel_dp *intel_dp, | 5779 | static bool intel_edp_init_connector(struct intel_dp *intel_dp, |
5817 | struct intel_connector *intel_connector) | 5780 | struct intel_connector *intel_connector) |
5818 | { | 5781 | { |
5819 | struct drm_connector *connector = &intel_connector->base; | 5782 | struct drm_device *dev = intel_dp_to_dev(intel_dp); |
5820 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | ||
5821 | struct intel_encoder *intel_encoder = &intel_dig_port->base; | ||
5822 | struct drm_device *dev = intel_encoder->base.dev; | ||
5823 | struct drm_i915_private *dev_priv = to_i915(dev); | 5783 | struct drm_i915_private *dev_priv = to_i915(dev); |
5784 | struct drm_connector *connector = &intel_connector->base; | ||
5824 | struct drm_display_mode *fixed_mode = NULL; | 5785 | struct drm_display_mode *fixed_mode = NULL; |
5825 | struct drm_display_mode *alt_fixed_mode = NULL; | 5786 | struct drm_display_mode *alt_fixed_mode = NULL; |
5826 | struct drm_display_mode *downclock_mode = NULL; | 5787 | struct drm_display_mode *downclock_mode = NULL; |
@@ -5838,7 +5799,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, | |||
5838 | * eDP and LVDS bail out early in this case to prevent interfering | 5799 | * eDP and LVDS bail out early in this case to prevent interfering |
5839 | * with an already powered-on LVDS power sequencer. | 5800 | * with an already powered-on LVDS power sequencer. |
5840 | */ | 5801 | */ |
5841 | if (intel_get_lvds_encoder(dev)) { | 5802 | if (intel_get_lvds_encoder(&dev_priv->drm)) { |
5842 | WARN_ON(!(HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv))); | 5803 | WARN_ON(!(HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv))); |
5843 | DRM_INFO("LVDS was detected, not registering eDP\n"); | 5804 | DRM_INFO("LVDS was detected, not registering eDP\n"); |
5844 | 5805 | ||
@@ -5848,7 +5809,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, | |||
5848 | pps_lock(intel_dp); | 5809 | pps_lock(intel_dp); |
5849 | 5810 | ||
5850 | intel_dp_init_panel_power_timestamps(intel_dp); | 5811 | intel_dp_init_panel_power_timestamps(intel_dp); |
5851 | intel_dp_pps_init(dev, intel_dp); | 5812 | intel_dp_pps_init(intel_dp); |
5852 | intel_edp_panel_vdd_sanitize(intel_dp); | 5813 | intel_edp_panel_vdd_sanitize(intel_dp); |
5853 | 5814 | ||
5854 | pps_unlock(intel_dp); | 5815 | pps_unlock(intel_dp); |
@@ -5948,9 +5909,9 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port) | |||
5948 | struct intel_encoder *encoder = &intel_dig_port->base; | 5909 | struct intel_encoder *encoder = &intel_dig_port->base; |
5949 | struct intel_dp *intel_dp = &intel_dig_port->dp; | 5910 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
5950 | 5911 | ||
5951 | encoder->hpd_pin = intel_hpd_pin(intel_dig_port->port); | 5912 | encoder->hpd_pin = intel_hpd_pin(encoder->port); |
5952 | 5913 | ||
5953 | switch (intel_dig_port->port) { | 5914 | switch (encoder->port) { |
5954 | case PORT_A: | 5915 | case PORT_A: |
5955 | intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A; | 5916 | intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A; |
5956 | break; | 5917 | break; |
@@ -5968,7 +5929,7 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port) | |||
5968 | intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D; | 5929 | intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D; |
5969 | break; | 5930 | break; |
5970 | default: | 5931 | default: |
5971 | MISSING_CASE(intel_dig_port->port); | 5932 | MISSING_CASE(encoder->port); |
5972 | } | 5933 | } |
5973 | } | 5934 | } |
5974 | 5935 | ||
@@ -6004,7 +5965,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, | |||
6004 | struct intel_encoder *intel_encoder = &intel_dig_port->base; | 5965 | struct intel_encoder *intel_encoder = &intel_dig_port->base; |
6005 | struct drm_device *dev = intel_encoder->base.dev; | 5966 | struct drm_device *dev = intel_encoder->base.dev; |
6006 | struct drm_i915_private *dev_priv = to_i915(dev); | 5967 | struct drm_i915_private *dev_priv = to_i915(dev); |
6007 | enum port port = intel_dig_port->port; | 5968 | enum port port = intel_encoder->port; |
6008 | int type; | 5969 | int type; |
6009 | 5970 | ||
6010 | /* Initialize the work for modeset in case of link train failure */ | 5971 | /* Initialize the work for modeset in case of link train failure */ |
@@ -6174,7 +6135,6 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, | |||
6174 | intel_encoder->disable = g4x_disable_dp; | 6135 | intel_encoder->disable = g4x_disable_dp; |
6175 | } | 6136 | } |
6176 | 6137 | ||
6177 | intel_dig_port->port = port; | ||
6178 | intel_dig_port->dp.output_reg = output_reg; | 6138 | intel_dig_port->dp.output_reg = output_reg; |
6179 | intel_dig_port->max_lanes = 4; | 6139 | intel_dig_port->max_lanes = 4; |
6180 | 6140 | ||