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authorVandita Kulkarni <vandita.kulkarni@intel.com>2018-10-03 03:21:59 -0400
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-10-16 12:00:57 -0400
commit8ea59e67399035e1e8f9f250ec12dfe0a94e6ce9 (patch)
tree5b5cd27ba3566120d0f734049edb702672afcf68 /drivers/gpu/drm/i915/intel_display.c
parentcb6caf7e39938294632cd4996baf3b10d3038dcc (diff)
drm/i915/icl: Use helper functions to classify the ports
Use intel_port_is_tc and intel_port_is_combophy functions to replace the individual port checks from port C to F and port A to B respectively. Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181003072203.12848-5-mahesh1.kumar@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 93fb961030ae..cfab3c3872c1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9269,24 +9269,17 @@ static void icelake_get_ddi_pll(struct drm_i915_private *dev_priv,
9269 u32 temp; 9269 u32 temp;
9270 9270
9271 /* TODO: TBT pll not implemented. */ 9271 /* TODO: TBT pll not implemented. */
9272 switch (port) { 9272 if (intel_port_is_combophy(dev_priv, port)) {
9273 case PORT_A:
9274 case PORT_B:
9275 temp = I915_READ(DPCLKA_CFGCR0_ICL) & 9273 temp = I915_READ(DPCLKA_CFGCR0_ICL) &
9276 DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); 9274 DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);
9277 id = temp >> DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port); 9275 id = temp >> DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port);
9278 9276
9279 if (WARN_ON(id != DPLL_ID_ICL_DPLL0 && id != DPLL_ID_ICL_DPLL1)) 9277 if (WARN_ON(id != DPLL_ID_ICL_DPLL0 && id != DPLL_ID_ICL_DPLL1))
9280 return; 9278 return;
9281 break; 9279 } else if (intel_port_is_tc(dev_priv, port)) {
9282 case PORT_C:
9283 case PORT_D:
9284 case PORT_E:
9285 case PORT_F:
9286 id = icl_port_to_mg_pll_id(port); 9280 id = icl_port_to_mg_pll_id(port);
9287 break; 9281 } else {
9288 default: 9282 WARN(1, "Invalid port %x\n", port);
9289 MISSING_CASE(port);
9290 return; 9283 return;
9291 } 9284 }
9292 9285