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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-01-09 02:38:23 -0500 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-01-09 02:38:23 -0500 |
| commit | da733563be5a9da26fe81d9f007262d00b846e22 (patch) | |
| tree | db28291df94a2043af2123911984c5c173da4e6f /drivers/gpu/drm/i915/intel_crt.c | |
| parent | 6ccbcf2cb41131f8d56ef0723bf3f7c1f8486076 (diff) | |
| parent | dab78d7924598ea4031663dd10db814e2e324928 (diff) | |
Merge branch 'next' into for-linus
Diffstat (limited to 'drivers/gpu/drm/i915/intel_crt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_crt.c | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 0979d8877880..fee0ad02c6d0 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
| @@ -69,7 +69,7 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode) | |||
| 69 | temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); | 69 | temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); |
| 70 | temp &= ~ADPA_DAC_ENABLE; | 70 | temp &= ~ADPA_DAC_ENABLE; |
| 71 | 71 | ||
| 72 | switch(mode) { | 72 | switch (mode) { |
| 73 | case DRM_MODE_DPMS_ON: | 73 | case DRM_MODE_DPMS_ON: |
| 74 | temp |= ADPA_DAC_ENABLE; | 74 | temp |= ADPA_DAC_ENABLE; |
| 75 | break; | 75 | break; |
| @@ -152,17 +152,13 @@ static void intel_crt_mode_set(struct drm_encoder *encoder, | |||
| 152 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | 152 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
| 153 | adpa |= ADPA_VSYNC_ACTIVE_HIGH; | 153 | adpa |= ADPA_VSYNC_ACTIVE_HIGH; |
| 154 | 154 | ||
| 155 | if (intel_crtc->pipe == 0) { | 155 | /* For CPT allow 3 pipe config, for others just use A or B */ |
| 156 | if (HAS_PCH_CPT(dev)) | 156 | if (HAS_PCH_CPT(dev)) |
| 157 | adpa |= PORT_TRANS_A_SEL_CPT; | 157 | adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); |
| 158 | else | 158 | else if (intel_crtc->pipe == 0) |
| 159 | adpa |= ADPA_PIPE_A_SELECT; | 159 | adpa |= ADPA_PIPE_A_SELECT; |
| 160 | } else { | 160 | else |
| 161 | if (HAS_PCH_CPT(dev)) | 161 | adpa |= ADPA_PIPE_B_SELECT; |
| 162 | adpa |= PORT_TRANS_B_SEL_CPT; | ||
| 163 | else | ||
| 164 | adpa |= ADPA_PIPE_B_SELECT; | ||
| 165 | } | ||
| 166 | 162 | ||
| 167 | if (!HAS_PCH_SPLIT(dev)) | 163 | if (!HAS_PCH_SPLIT(dev)) |
| 168 | I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); | 164 | I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); |
