drm/i915: Introduce concept of per-timeline (context) HWSP

Supplement the per-engine HWSP with a per-timeline HWSP. That is a
per-request pointer through which we can check a local seqno,
abstracting away the presumption of a global seqno. In this first step,
we point each request back into the engine's HWSP so everything
continues to work with the global timeline.

v2: s/i915_request_hwsp/hwsp_seqno/ to emphasis that this is the current
HW value and that we are accessing it via i915_request merely as a
convenience.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190128181812.22804-1-chris@chris-wilson.co.uk

1 files changed, 11 insertions, 5 deletions

diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index f4241a17e2ad..a076fd0b7ba6 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -182,10 +182,11 @@ static void free_capture_list(struct i915_request *request)
 static void __retire_engine_request(struct intel_engine_cs *engine,
                                     struct i915_request *rq)
 {
-        GEM_TRACE("%s(%s) fence %llx:%lld, global=%d, current %d\n",
+        GEM_TRACE("%s(%s) fence %llx:%lld, global=%d, current %d:%d\n",
                   __func__, engine->name,
                   rq->fence.context, rq->fence.seqno,
                   rq->global_seqno,
+                  hwsp_seqno(rq),
                   intel_engine_get_seqno(engine));
 
         GEM_BUG_ON(!i915_request_completed(rq));
@@ -244,10 +245,11 @@ static void i915_request_retire(struct i915_request *request)
 {
         struct i915_gem_active *active, *next;
 
-        GEM_TRACE("%s fence %llx:%lld, global=%d, current %d\n",
+        GEM_TRACE("%s fence %llx:%lld, global=%d, current %d:%d\n",
                   request->engine->name,
                   request->fence.context, request->fence.seqno,
                   request->global_seqno,
+                  hwsp_seqno(request),
                   intel_engine_get_seqno(request->engine));
 
         lockdep_assert_held(&request->i915->drm.struct_mutex);
@@ -307,10 +309,11 @@ void i915_request_retire_upto(struct i915_request *rq)
         struct intel_ring *ring = rq->ring;
         struct i915_request *tmp;
 
-        GEM_TRACE("%s fence %llx:%lld, global=%d, current %d\n",
+        GEM_TRACE("%s fence %llx:%lld, global=%d, current %d:%d\n",
                   rq->engine->name,
                   rq->fence.context, rq->fence.seqno,
                   rq->global_seqno,
+                  hwsp_seqno(rq),
                   intel_engine_get_seqno(rq->engine));
 
         lockdep_assert_held(&rq->i915->drm.struct_mutex);
@@ -355,10 +358,11 @@ void __i915_request_submit(struct i915_request *request)
         struct intel_engine_cs *engine = request->engine;
         u32 seqno;
 
-        GEM_TRACE("%s fence %llx:%lld -> global=%d, current %d\n",
+        GEM_TRACE("%s fence %llx:%lld -> global=%d, current %d:%d\n",
                   engine->name,
                   request->fence.context, request->fence.seqno,
                   engine->timeline.seqno + 1,
+                  hwsp_seqno(request),
                   intel_engine_get_seqno(engine));
 
         GEM_BUG_ON(!irqs_disabled());
@@ -405,10 +409,11 @@ void __i915_request_unsubmit(struct i915_request *request)
 {
         struct intel_engine_cs *engine = request->engine;
 
-        GEM_TRACE("%s fence %llx:%lld <- global=%d, current %d\n",
+        GEM_TRACE("%s fence %llx:%lld <- global=%d, current %d:%d\n",
                   engine->name,
                   request->fence.context, request->fence.seqno,
                   request->global_seqno,
+                  hwsp_seqno(request),
                   intel_engine_get_seqno(engine));
 
         GEM_BUG_ON(!irqs_disabled());
@@ -616,6 +621,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
         rq->ring = ce->ring;
         rq->timeline = ce->ring->timeline;
         GEM_BUG_ON(rq->timeline == &engine->timeline);
+        rq->hwsp_seqno = &engine->status_page.addr[I915_GEM_HWS_INDEX];
 
         spin_lock_init(&rq->lock);
         dma_fence_init(&rq->fence,