diff options
author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-01-29 18:22:15 -0500 |
---|---|---|
committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-01-30 13:24:14 -0500 |
commit | a324fcaca314cafccda77a68ef1f7f6a1355de2c (patch) | |
tree | 05a998521e9138e36ff84ac0505da5108c9133e0 /drivers/gpu/drm/i915/i915_irq.c | |
parent | 3f43031b169361fefe032c13ebf644d17f3d76d6 (diff) |
drm/i915/cnl: Add AUX-F support
On some Cannonlake SKUs we have a dedicated Aux for port F,
that is only the full split between port A and port E.
There is still no Aux E for Port E, as in previous platforms,
because port_E still means shared lanes with port A.
v2: Rebase.
v3: Add couple missed PORT_F cases on intel_dp.
v4: Rebase and fix commit message.
v5: Squash Imre's "drm/i915: Add missing AUX_F power well string"
v6: Rebase on top of display headers rework.
v7: s/IS_CANNONLAKE/IS_CNL_WITH_PORT_F (DK)
v8: Fix Aux bits for Port F (DK)
v9: Fix VBT definition of Port F (DK).
v10: Squash power well addition to this patch to avoid
warns as pointed by DK.
v11: Clean up squashed commit message. (David)
v12: Remove unnecessary handling for older platforms (DK)
Adding AUX_F to PG2 following other existent ones. (DK)
Cc: David Weinehall <david.weinehall@linux.intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180129232223.766-2-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 85c46a25265d..79fadb50ab69 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -2585,6 +2585,9 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) | |||
2585 | GEN9_AUX_CHANNEL_C | | 2585 | GEN9_AUX_CHANNEL_C | |
2586 | GEN9_AUX_CHANNEL_D; | 2586 | GEN9_AUX_CHANNEL_D; |
2587 | 2587 | ||
2588 | if (IS_CNL_WITH_PORT_F(dev_priv)) | ||
2589 | tmp_mask |= CNL_AUX_CHANNEL_F; | ||
2590 | |||
2588 | if (iir & tmp_mask) { | 2591 | if (iir & tmp_mask) { |
2589 | dp_aux_irq_handler(dev_priv); | 2592 | dp_aux_irq_handler(dev_priv); |
2590 | found = true; | 2593 | found = true; |
@@ -3617,6 +3620,9 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) | |||
3617 | de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS; | 3620 | de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS; |
3618 | } | 3621 | } |
3619 | 3622 | ||
3623 | if (IS_CNL_WITH_PORT_F(dev_priv)) | ||
3624 | de_port_masked |= CNL_AUX_CHANNEL_F; | ||
3625 | |||
3620 | de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK | | 3626 | de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK | |
3621 | GEN8_PIPE_FIFO_UNDERRUN; | 3627 | GEN8_PIPE_FIFO_UNDERRUN; |
3622 | 3628 | ||