diff options
author | Alan Cox <alan@linux.intel.com> | 2012-03-08 11:00:31 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2012-03-10 08:05:28 -0500 |
commit | 648a8e342c5a754bdc62f003d3af90507c1abfde (patch) | |
tree | 95dd76398a23ac3d6a662c7f71445aa22a89302a /drivers/gpu/drm/gma500/psb_intel_lvds.c | |
parent | 933315acb6e223d4da36cb0b95d18dcfa6323658 (diff) |
gma500: now move the Oaktrail save state into its own structure
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/gma500/psb_intel_lvds.c')
-rw-r--r-- | drivers/gpu/drm/gma500/psb_intel_lvds.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/gma500/psb_intel_lvds.c b/drivers/gpu/drm/gma500/psb_intel_lvds.c index a25e4ca5e91c..69a96513752f 100644 --- a/drivers/gpu/drm/gma500/psb_intel_lvds.c +++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c | |||
@@ -77,7 +77,7 @@ static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev) | |||
77 | ret = REG_READ(BLC_PWM_CTL); | 77 | ret = REG_READ(BLC_PWM_CTL); |
78 | gma_power_end(dev); | 78 | gma_power_end(dev); |
79 | } else /* Powered off, use the saved value */ | 79 | } else /* Powered off, use the saved value */ |
80 | ret = dev_priv->saveBLC_PWM_CTL; | 80 | ret = dev_priv->regs.saveBLC_PWM_CTL; |
81 | 81 | ||
82 | /* Top 15bits hold the frequency mask */ | 82 | /* Top 15bits hold the frequency mask */ |
83 | ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >> | 83 | ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >> |
@@ -86,7 +86,7 @@ static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev) | |||
86 | ret *= 2; /* Return a 16bit range as needed for setting */ | 86 | ret *= 2; /* Return a 16bit range as needed for setting */ |
87 | if (ret == 0) | 87 | if (ret == 0) |
88 | dev_err(dev->dev, "BL bug: Reg %08x save %08X\n", | 88 | dev_err(dev->dev, "BL bug: Reg %08x save %08X\n", |
89 | REG_READ(BLC_PWM_CTL), dev_priv->saveBLC_PWM_CTL); | 89 | REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); |
90 | return ret; | 90 | return ret; |
91 | } | 91 | } |
92 | 92 | ||
@@ -203,13 +203,13 @@ static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level) | |||
203 | REG_WRITE(BLC_PWM_CTL, | 203 | REG_WRITE(BLC_PWM_CTL, |
204 | (blc_pwm_ctl | | 204 | (blc_pwm_ctl | |
205 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT))); | 205 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT))); |
206 | dev_priv->saveBLC_PWM_CTL = (blc_pwm_ctl | | 206 | dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl | |
207 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); | 207 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); |
208 | gma_power_end(dev); | 208 | gma_power_end(dev); |
209 | } else { | 209 | } else { |
210 | blc_pwm_ctl = dev_priv->saveBLC_PWM_CTL & | 210 | blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL & |
211 | ~BACKLIGHT_DUTY_CYCLE_MASK; | 211 | ~BACKLIGHT_DUTY_CYCLE_MASK; |
212 | dev_priv->saveBLC_PWM_CTL = (blc_pwm_ctl | | 212 | dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl | |
213 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); | 213 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); |
214 | } | 214 | } |
215 | } | 215 | } |
@@ -283,7 +283,7 @@ static void psb_intel_lvds_save(struct drm_connector *connector) | |||
283 | lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS); | 283 | lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS); |
284 | 284 | ||
285 | /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/ | 285 | /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/ |
286 | dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL & | 286 | dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL & |
287 | BACKLIGHT_DUTY_CYCLE_MASK); | 287 | BACKLIGHT_DUTY_CYCLE_MASK); |
288 | 288 | ||
289 | /* | 289 | /* |