diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2016-01-24 12:35:48 -0500 |
---|---|---|
committer | Lucas Stach <l.stach@pengutronix.de> | 2016-01-26 12:53:56 -0500 |
commit | 507f899137f9e4f1405820b946063a6db78b2295 (patch) | |
tree | 167b23ca1cf6037330816c81e38c3a6e49f203ae /drivers/gpu/drm/etnaviv | |
parent | e2a2e263e06a0c153234b3e93fb85612d1c454d3 (diff) |
drm/etnaviv: use defined constants for the chip model
Use the defined constants in common.xml.h for the chip model rather
than coding these as hex numbers.
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'drivers/gpu/drm/etnaviv')
-rw-r--r-- | drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index a9530f59e6fe..7dc355ef7c4e 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c | |||
@@ -173,7 +173,7 @@ static void etnaviv_hw_specs(struct etnaviv_gpu *gpu) | |||
173 | /* Convert the register max value */ | 173 | /* Convert the register max value */ |
174 | if (gpu->identity.register_max) | 174 | if (gpu->identity.register_max) |
175 | gpu->identity.register_max = 1 << gpu->identity.register_max; | 175 | gpu->identity.register_max = 1 << gpu->identity.register_max; |
176 | else if (gpu->identity.model == 0x0400) | 176 | else if (gpu->identity.model == chipModel_GC400) |
177 | gpu->identity.register_max = 32; | 177 | gpu->identity.register_max = 32; |
178 | else | 178 | else |
179 | gpu->identity.register_max = 64; | 179 | gpu->identity.register_max = 64; |
@@ -181,10 +181,10 @@ static void etnaviv_hw_specs(struct etnaviv_gpu *gpu) | |||
181 | /* Convert thread count */ | 181 | /* Convert thread count */ |
182 | if (gpu->identity.thread_count) | 182 | if (gpu->identity.thread_count) |
183 | gpu->identity.thread_count = 1 << gpu->identity.thread_count; | 183 | gpu->identity.thread_count = 1 << gpu->identity.thread_count; |
184 | else if (gpu->identity.model == 0x0400) | 184 | else if (gpu->identity.model == chipModel_GC400) |
185 | gpu->identity.thread_count = 64; | 185 | gpu->identity.thread_count = 64; |
186 | else if (gpu->identity.model == 0x0500 || | 186 | else if (gpu->identity.model == chipModel_GC500 || |
187 | gpu->identity.model == 0x0530) | 187 | gpu->identity.model == chipModel_GC530) |
188 | gpu->identity.thread_count = 128; | 188 | gpu->identity.thread_count = 128; |
189 | else | 189 | else |
190 | gpu->identity.thread_count = 256; | 190 | gpu->identity.thread_count = 256; |
@@ -206,7 +206,7 @@ static void etnaviv_hw_specs(struct etnaviv_gpu *gpu) | |||
206 | if (gpu->identity.vertex_output_buffer_size) { | 206 | if (gpu->identity.vertex_output_buffer_size) { |
207 | gpu->identity.vertex_output_buffer_size = | 207 | gpu->identity.vertex_output_buffer_size = |
208 | 1 << gpu->identity.vertex_output_buffer_size; | 208 | 1 << gpu->identity.vertex_output_buffer_size; |
209 | } else if (gpu->identity.model == 0x0400) { | 209 | } else if (gpu->identity.model == chipModel_GC400) { |
210 | if (gpu->identity.revision < 0x4000) | 210 | if (gpu->identity.revision < 0x4000) |
211 | gpu->identity.vertex_output_buffer_size = 512; | 211 | gpu->identity.vertex_output_buffer_size = 512; |
212 | else if (gpu->identity.revision < 0x4200) | 212 | else if (gpu->identity.revision < 0x4200) |
@@ -219,9 +219,9 @@ static void etnaviv_hw_specs(struct etnaviv_gpu *gpu) | |||
219 | 219 | ||
220 | switch (gpu->identity.instruction_count) { | 220 | switch (gpu->identity.instruction_count) { |
221 | case 0: | 221 | case 0: |
222 | if ((gpu->identity.model == 0x2000 && | 222 | if ((gpu->identity.model == chipModel_GC2000 && |
223 | gpu->identity.revision == 0x5108) || | 223 | gpu->identity.revision == 0x5108) || |
224 | gpu->identity.model == 0x880) | 224 | gpu->identity.model == chipModel_GC880) |
225 | gpu->identity.instruction_count = 512; | 225 | gpu->identity.instruction_count = 512; |
226 | else | 226 | else |
227 | gpu->identity.instruction_count = 256; | 227 | gpu->identity.instruction_count = 256; |
@@ -253,7 +253,7 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) | |||
253 | /* Special case for older graphic cores. */ | 253 | /* Special case for older graphic cores. */ |
254 | if (((chipIdentity & VIVS_HI_CHIP_IDENTITY_FAMILY__MASK) | 254 | if (((chipIdentity & VIVS_HI_CHIP_IDENTITY_FAMILY__MASK) |
255 | >> VIVS_HI_CHIP_IDENTITY_FAMILY__SHIFT) == 0x01) { | 255 | >> VIVS_HI_CHIP_IDENTITY_FAMILY__SHIFT) == 0x01) { |
256 | gpu->identity.model = 0x500; /* gc500 */ | 256 | gpu->identity.model = chipModel_GC500; |
257 | gpu->identity.revision = | 257 | gpu->identity.revision = |
258 | (chipIdentity & VIVS_HI_CHIP_IDENTITY_REVISION__MASK) | 258 | (chipIdentity & VIVS_HI_CHIP_IDENTITY_REVISION__MASK) |
259 | >> VIVS_HI_CHIP_IDENTITY_REVISION__SHIFT; | 259 | >> VIVS_HI_CHIP_IDENTITY_REVISION__SHIFT; |
@@ -269,12 +269,12 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) | |||
269 | * same. Only for GC400 family. | 269 | * same. Only for GC400 family. |
270 | */ | 270 | */ |
271 | if ((gpu->identity.model & 0xff00) == 0x0400 && | 271 | if ((gpu->identity.model & 0xff00) == 0x0400 && |
272 | gpu->identity.model != 0x0420) { | 272 | gpu->identity.model != chipModel_GC420) { |
273 | gpu->identity.model = gpu->identity.model & 0x0400; | 273 | gpu->identity.model = gpu->identity.model & 0x0400; |
274 | } | 274 | } |
275 | 275 | ||
276 | /* Another special case */ | 276 | /* Another special case */ |
277 | if (gpu->identity.model == 0x300 && | 277 | if (gpu->identity.model == chipModel_GC300 && |
278 | gpu->identity.revision == 0x2201) { | 278 | gpu->identity.revision == 0x2201) { |
279 | u32 chipDate = gpu_read(gpu, VIVS_HI_CHIP_DATE); | 279 | u32 chipDate = gpu_read(gpu, VIVS_HI_CHIP_DATE); |
280 | u32 chipTime = gpu_read(gpu, VIVS_HI_CHIP_TIME); | 280 | u32 chipTime = gpu_read(gpu, VIVS_HI_CHIP_TIME); |
@@ -295,11 +295,13 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) | |||
295 | gpu->identity.features = gpu_read(gpu, VIVS_HI_CHIP_FEATURE); | 295 | gpu->identity.features = gpu_read(gpu, VIVS_HI_CHIP_FEATURE); |
296 | 296 | ||
297 | /* Disable fast clear on GC700. */ | 297 | /* Disable fast clear on GC700. */ |
298 | if (gpu->identity.model == 0x700) | 298 | if (gpu->identity.model == chipModel_GC700) |
299 | gpu->identity.features &= ~chipFeatures_FAST_CLEAR; | 299 | gpu->identity.features &= ~chipFeatures_FAST_CLEAR; |
300 | 300 | ||
301 | if ((gpu->identity.model == 0x500 && gpu->identity.revision < 2) || | 301 | if ((gpu->identity.model == chipModel_GC500 && |
302 | (gpu->identity.model == 0x300 && gpu->identity.revision < 0x2000)) { | 302 | gpu->identity.revision < 2) || |
303 | (gpu->identity.model == chipModel_GC300 && | ||
304 | gpu->identity.revision < 0x2000)) { | ||
303 | 305 | ||
304 | /* | 306 | /* |
305 | * GC500 rev 1.x and GC300 rev < 2.0 doesn't have these | 307 | * GC500 rev 1.x and GC300 rev < 2.0 doesn't have these |
@@ -466,7 +468,8 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu) | |||
466 | VIVS_HI_AXI_CONFIG_ARCACHE(2)); | 468 | VIVS_HI_AXI_CONFIG_ARCACHE(2)); |
467 | 469 | ||
468 | /* GC2000 rev 5108 needs a special bus config */ | 470 | /* GC2000 rev 5108 needs a special bus config */ |
469 | if (gpu->identity.model == 0x2000 && gpu->identity.revision == 0x5108) { | 471 | if (gpu->identity.model == chipModel_GC2000 && |
472 | gpu->identity.revision == 0x5108) { | ||
470 | u32 bus_config = gpu_read(gpu, VIVS_MC_BUS_CONFIG); | 473 | u32 bus_config = gpu_read(gpu, VIVS_MC_BUS_CONFIG); |
471 | bus_config &= ~(VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG__MASK | | 474 | bus_config &= ~(VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG__MASK | |
472 | VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG__MASK); | 475 | VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG__MASK); |