diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2013-01-04 14:10:42 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2013-02-07 22:54:31 -0500 |
commit | dd66cc2e1f4765d0e6f39eb1e7d8d64d3f1cc522 (patch) | |
tree | 4fb97623aae202968b86abb4c84b1dca5b63214f /drivers/gpu/drm/drm_pci.c | |
parent | f8acf6f4c8fe1fd4de1f669ac6a3c71e89f13523 (diff) |
drm/pci: Use PCI Express Capability accessors
Use PCI Express Capability access functions to simplify this code a bit.
For non-PCIe devices or pre-PCIe 3.0 devices that don't implement the Link
Capabilities 2 register, pcie_capability_read_dword() reads a zero.
Since we're only testing whether the bits we care about are set, there's no
need to mask out the other bits we *don't* care about.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/drm_pci.c')
-rw-r--r-- | drivers/gpu/drm/drm_pci.c | 21 |
1 files changed, 5 insertions, 16 deletions
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c index 50e26f2d198e..86102a08f65c 100644 --- a/drivers/gpu/drm/drm_pci.c +++ b/drivers/gpu/drm/drm_pci.c | |||
@@ -469,41 +469,30 @@ EXPORT_SYMBOL(drm_pci_exit); | |||
469 | int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) | 469 | int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) |
470 | { | 470 | { |
471 | struct pci_dev *root; | 471 | struct pci_dev *root; |
472 | int pos; | 472 | u32 lnkcap, lnkcap2; |
473 | u32 lnkcap = 0, lnkcap2 = 0; | ||
474 | 473 | ||
475 | *mask = 0; | 474 | *mask = 0; |
476 | if (!dev->pdev) | 475 | if (!dev->pdev) |
477 | return -EINVAL; | 476 | return -EINVAL; |
478 | 477 | ||
479 | if (!pci_is_pcie(dev->pdev)) | ||
480 | return -EINVAL; | ||
481 | |||
482 | root = dev->pdev->bus->self; | 478 | root = dev->pdev->bus->self; |
483 | 479 | ||
484 | pos = pci_pcie_cap(root); | ||
485 | if (!pos) | ||
486 | return -EINVAL; | ||
487 | |||
488 | /* we've been informed via and serverworks don't make the cut */ | 480 | /* we've been informed via and serverworks don't make the cut */ |
489 | if (root->vendor == PCI_VENDOR_ID_VIA || | 481 | if (root->vendor == PCI_VENDOR_ID_VIA || |
490 | root->vendor == PCI_VENDOR_ID_SERVERWORKS) | 482 | root->vendor == PCI_VENDOR_ID_SERVERWORKS) |
491 | return -EINVAL; | 483 | return -EINVAL; |
492 | 484 | ||
493 | pci_read_config_dword(root, pos + PCI_EXP_LNKCAP, &lnkcap); | 485 | pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap); |
494 | pci_read_config_dword(root, pos + PCI_EXP_LNKCAP2, &lnkcap2); | 486 | pcie_capability_read_dword(root, PCI_EXP_LNKCAP2, &lnkcap2); |
495 | |||
496 | lnkcap &= PCI_EXP_LNKCAP_SLS; | ||
497 | lnkcap2 &= 0xfe; | ||
498 | 487 | ||
499 | if (lnkcap2) { /* PCIE GEN 3.0 */ | 488 | if (lnkcap2) { /* PCIe r3.0-compliant */ |
500 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) | 489 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) |
501 | *mask |= DRM_PCIE_SPEED_25; | 490 | *mask |= DRM_PCIE_SPEED_25; |
502 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) | 491 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) |
503 | *mask |= DRM_PCIE_SPEED_50; | 492 | *mask |= DRM_PCIE_SPEED_50; |
504 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) | 493 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) |
505 | *mask |= DRM_PCIE_SPEED_80; | 494 | *mask |= DRM_PCIE_SPEED_80; |
506 | } else { | 495 | } else { /* pre-r3.0 */ |
507 | if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) | 496 | if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) |
508 | *mask |= DRM_PCIE_SPEED_25; | 497 | *mask |= DRM_PCIE_SPEED_25; |
509 | if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) | 498 | if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) |