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authorAlex Deucher <alexander.deucher@amd.com>2019-07-25 11:55:25 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-07-31 00:24:39 -0400
commite254102d5079f83376b6b6b227e546bcde89683c (patch)
tree27e3059ab22b0b50ce0b35d519b0e99dbc03eacb /drivers/gpu/drm/amd
parenta906277d22f790418e68a2ad0feba6617b165d40 (diff)
drm/amdgpu/powerplay: add set_mp1_state for vega10
This sets the SMU into the proper state for various operations (shutdown, unload, GPU reset, etc.). Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 3be8eb21fd6e..948c54cb9c5d 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -5219,6 +5219,30 @@ static int vega10_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
5219 return 0; 5219 return 0;
5220} 5220}
5221 5221
5222static int vega10_set_mp1_state(struct pp_hwmgr *hwmgr,
5223 enum pp_mp1_state mp1_state)
5224{
5225 uint16_t msg;
5226 int ret;
5227
5228 switch (mp1_state) {
5229 case PP_MP1_STATE_UNLOAD:
5230 msg = PPSMC_MSG_PrepareMp1ForUnload;
5231 break;
5232 case PP_MP1_STATE_SHUTDOWN:
5233 case PP_MP1_STATE_RESET:
5234 case PP_MP1_STATE_NONE:
5235 default:
5236 return 0;
5237 }
5238
5239 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg)) == 0,
5240 "[PrepareMp1] Failed!",
5241 return ret);
5242
5243 return 0;
5244}
5245
5222static int vega10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, 5246static int vega10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
5223 PHM_PerformanceLevelDesignation designation, uint32_t index, 5247 PHM_PerformanceLevelDesignation designation, uint32_t index,
5224 PHM_PerformanceLevel *level) 5248 PHM_PerformanceLevel *level)
@@ -5308,6 +5332,7 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
5308 .enable_mgpu_fan_boost = vega10_enable_mgpu_fan_boost, 5332 .enable_mgpu_fan_boost = vega10_enable_mgpu_fan_boost,
5309 .get_ppfeature_status = vega10_get_ppfeature_status, 5333 .get_ppfeature_status = vega10_get_ppfeature_status,
5310 .set_ppfeature_status = vega10_set_ppfeature_status, 5334 .set_ppfeature_status = vega10_set_ppfeature_status,
5335 .set_mp1_state = vega10_set_mp1_state,
5311}; 5336};
5312 5337
5313int vega10_hwmgr_init(struct pp_hwmgr *hwmgr) 5338int vega10_hwmgr_init(struct pp_hwmgr *hwmgr)