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authorAaron Liu <aaron.liu@amd.com>2018-12-04 22:07:55 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-12-07 17:53:13 -0500
commitc50fe0c5b174153669fd437c1c5fde724b3bc7f4 (patch)
treee4cebdd1cf3ff010e9f24e15d61e9d9637862053 /drivers/gpu/drm/amd
parent34c08da2097abe99cdc4757194f10a0c51148ce3 (diff)
drm/amdgpu: both support PCO FP5/AM4 rlc fw
For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin For Picasso && FP5 SOCKET board, we use picasso_rlc.bin Judgment method: PCO AM4: revision >= 0xC8 && revision <= 0xCF or revision >= 0xD8 && revision <= 0xDF otherwise is PCO FP5 Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher at amd.com> Reviewed-by: Huang Rui <ray.huang at amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index af8ccb014be3..f62d570a81a8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -86,6 +86,7 @@ MODULE_FIRMWARE("amdgpu/picasso_me.bin");
86MODULE_FIRMWARE("amdgpu/picasso_mec.bin"); 86MODULE_FIRMWARE("amdgpu/picasso_mec.bin");
87MODULE_FIRMWARE("amdgpu/picasso_mec2.bin"); 87MODULE_FIRMWARE("amdgpu/picasso_mec2.bin");
88MODULE_FIRMWARE("amdgpu/picasso_rlc.bin"); 88MODULE_FIRMWARE("amdgpu/picasso_rlc.bin");
89MODULE_FIRMWARE("amdgpu/picasso_rlc_am4.bin");
89 90
90MODULE_FIRMWARE("amdgpu/raven2_ce.bin"); 91MODULE_FIRMWARE("amdgpu/raven2_ce.bin");
91MODULE_FIRMWARE("amdgpu/raven2_pfp.bin"); 92MODULE_FIRMWARE("amdgpu/raven2_pfp.bin");
@@ -645,7 +646,20 @@ static int gfx_v9_0_init_microcode(struct amdgpu_device *adev)
645 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); 646 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
646 adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); 647 adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
647 648
648 snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); 649 /*
650 * For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
651 * instead of picasso_rlc.bin.
652 * Judgment method:
653 * PCO AM4: revision >= 0xC8 && revision <= 0xCF
654 * or revision >= 0xD8 && revision <= 0xDF
655 * otherwise is PCO FP5
656 */
657 if (!strcmp(chip_name, "picasso") &&
658 (((adev->pdev->revision >= 0xC8) && (adev->pdev->revision <= 0xCF)) ||
659 ((adev->pdev->revision >= 0xD8) && (adev->pdev->revision <= 0xDF))))
660 snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc_am4.bin", chip_name);
661 else
662 snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
649 err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); 663 err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
650 if (err) 664 if (err)
651 goto out; 665 goto out;