diff options
author | Xiangliang Yu <Xiangliang.Yu@amd.com> | 2017-04-21 02:06:09 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-05-24 17:40:04 -0400 |
commit | ab276632ec62064fb94dbbd441a94062e8bcd37a (patch) | |
tree | 89ec70b688635991ba0f1a573ed76560493c0727 /drivers/gpu/drm/amd | |
parent | 213cacefcd5c7815802281445ba503d26e794b77 (diff) |
drm/amdgpu/virt: change the place of virt_init_setting
Change place of virt_init_setting function so that can cover the
cg and pg flags configuration.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vi.c | 10 |
2 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 83ef7987660e..20a262fabc28 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c | |||
@@ -531,11 +531,6 @@ static int soc15_common_early_init(void *handle) | |||
531 | (amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_PSP))) | 531 | (amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_PSP))) |
532 | psp_enabled = true; | 532 | psp_enabled = true; |
533 | 533 | ||
534 | if (amdgpu_sriov_vf(adev)) { | ||
535 | amdgpu_virt_init_setting(adev); | ||
536 | xgpu_ai_mailbox_set_irq_funcs(adev); | ||
537 | } | ||
538 | |||
539 | /* | 534 | /* |
540 | * nbio need be used for both sdma and gfx9, but only | 535 | * nbio need be used for both sdma and gfx9, but only |
541 | * initializes once | 536 | * initializes once |
@@ -579,6 +574,11 @@ static int soc15_common_early_init(void *handle) | |||
579 | return -EINVAL; | 574 | return -EINVAL; |
580 | } | 575 | } |
581 | 576 | ||
577 | if (amdgpu_sriov_vf(adev)) { | ||
578 | amdgpu_virt_init_setting(adev); | ||
579 | xgpu_ai_mailbox_set_irq_funcs(adev); | ||
580 | } | ||
581 | |||
582 | adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type); | 582 | adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type); |
583 | 583 | ||
584 | amdgpu_get_pcie_info(adev); | 584 | amdgpu_get_pcie_info(adev); |
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index 5a275bc5459f..82175517c73c 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c | |||
@@ -894,11 +894,6 @@ static int vi_common_early_init(void *handle) | |||
894 | (amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_SMC))) | 894 | (amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_SMC))) |
895 | smc_enabled = true; | 895 | smc_enabled = true; |
896 | 896 | ||
897 | if (amdgpu_sriov_vf(adev)) { | ||
898 | amdgpu_virt_init_setting(adev); | ||
899 | xgpu_vi_mailbox_set_irq_funcs(adev); | ||
900 | } | ||
901 | |||
902 | adev->rev_id = vi_get_rev_id(adev); | 897 | adev->rev_id = vi_get_rev_id(adev); |
903 | adev->external_rev_id = 0xFF; | 898 | adev->external_rev_id = 0xFF; |
904 | switch (adev->asic_type) { | 899 | switch (adev->asic_type) { |
@@ -1071,6 +1066,11 @@ static int vi_common_early_init(void *handle) | |||
1071 | return -EINVAL; | 1066 | return -EINVAL; |
1072 | } | 1067 | } |
1073 | 1068 | ||
1069 | if (amdgpu_sriov_vf(adev)) { | ||
1070 | amdgpu_virt_init_setting(adev); | ||
1071 | xgpu_vi_mailbox_set_irq_funcs(adev); | ||
1072 | } | ||
1073 | |||
1074 | /* vi use smc load by default */ | 1074 | /* vi use smc load by default */ |
1075 | adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type); | 1075 | adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type); |
1076 | 1076 | ||