diff options
author | Tony Cheng <tony.cheng@amd.com> | 2017-04-22 14:17:51 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:06:41 -0400 |
commit | a2b8659db9b435853cb0dc78d225a492e7ee69d0 (patch) | |
tree | 90cbccc70e1be2712f2c2cf75a31f85ee236e45f /drivers/gpu/drm/amd | |
parent | 72ada5f76939ed00c07c584be7691a29d3c2c3da (diff) |
drm/amd/display: decouple resource_pool from resource_context
to avoid null access in case res_ctx is used to access res_pool before it's fully constructed
also make it clear which function has dependency on resource_pool
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
13 files changed, 161 insertions, 147 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 2e74faef68e7..37986632f025 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c | |||
@@ -736,7 +736,7 @@ static void program_timing_sync( | |||
736 | { | 736 | { |
737 | int i, j; | 737 | int i, j; |
738 | int group_index = 0; | 738 | int group_index = 0; |
739 | int pipe_count = ctx->res_ctx.pool->pipe_count; | 739 | int pipe_count = core_dc->res_pool->pipe_count; |
740 | struct pipe_ctx *unsynced_pipes[MAX_PIPES] = { NULL }; | 740 | struct pipe_ctx *unsynced_pipes[MAX_PIPES] = { NULL }; |
741 | 741 | ||
742 | for (i = 0; i < pipe_count; i++) { | 742 | for (i = 0; i < pipe_count; i++) { |
@@ -939,7 +939,7 @@ bool dc_post_update_surfaces_to_stream(struct dc *dc) | |||
939 | 939 | ||
940 | post_surface_trace(dc); | 940 | post_surface_trace(dc); |
941 | 941 | ||
942 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) | 942 | for (i = 0; i < core_dc->res_pool->pipe_count; i++) |
943 | if (context->res_ctx.pipe_ctx[i].stream == NULL) { | 943 | if (context->res_ctx.pipe_ctx[i].stream == NULL) { |
944 | context->res_ctx.pipe_ctx[i].pipe_idx = i; | 944 | context->res_ctx.pipe_ctx[i].pipe_idx = i; |
945 | core_dc->hwss.power_down_front_end( | 945 | core_dc->hwss.power_down_front_end( |
@@ -1015,7 +1015,7 @@ static bool is_surface_in_context( | |||
1015 | { | 1015 | { |
1016 | int j; | 1016 | int j; |
1017 | 1017 | ||
1018 | for (j = 0; j < context->res_ctx.pool->pipe_count; j++) { | 1018 | for (j = 0; j < MAX_PIPES; j++) { |
1019 | const struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; | 1019 | const struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; |
1020 | 1020 | ||
1021 | if (surface == &pipe_ctx->surface->public) { | 1021 | if (surface == &pipe_ctx->surface->public) { |
@@ -1245,7 +1245,8 @@ void dc_update_surfaces_and_stream(struct dc *dc, | |||
1245 | 1245 | ||
1246 | /* add surface to context */ | 1246 | /* add surface to context */ |
1247 | if (!resource_attach_surfaces_to_context( | 1247 | if (!resource_attach_surfaces_to_context( |
1248 | new_surfaces, surface_count, dc_stream, context)) { | 1248 | new_surfaces, surface_count, dc_stream, |
1249 | context, core_dc->res_pool)) { | ||
1249 | BREAK_TO_DEBUGGER(); | 1250 | BREAK_TO_DEBUGGER(); |
1250 | goto fail; | 1251 | goto fail; |
1251 | } | 1252 | } |
@@ -1304,7 +1305,7 @@ void dc_update_surfaces_and_stream(struct dc *dc, | |||
1304 | 1305 | ||
1305 | /* not sure if we still need this */ | 1306 | /* not sure if we still need this */ |
1306 | if (update_type == UPDATE_TYPE_FULL) { | 1307 | if (update_type == UPDATE_TYPE_FULL) { |
1307 | for (j = 0; j < context->res_ctx.pool->pipe_count; j++) { | 1308 | for (j = 0; j < core_dc->res_pool->pipe_count; j++) { |
1308 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; | 1309 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; |
1309 | 1310 | ||
1310 | if (pipe_ctx->surface != surface) | 1311 | if (pipe_ctx->surface != surface) |
@@ -1365,7 +1366,7 @@ void dc_update_surfaces_and_stream(struct dc *dc, | |||
1365 | for (i = 0; i < surface_count; i++) { | 1366 | for (i = 0; i < surface_count; i++) { |
1366 | struct core_surface *surface = DC_SURFACE_TO_CORE(srf_updates[i].surface); | 1367 | struct core_surface *surface = DC_SURFACE_TO_CORE(srf_updates[i].surface); |
1367 | 1368 | ||
1368 | for (j = 0; j < context->res_ctx.pool->pipe_count; j++) { | 1369 | for (j = 0; j < core_dc->res_pool->pipe_count; j++) { |
1369 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; | 1370 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; |
1370 | 1371 | ||
1371 | if (pipe_ctx->surface != surface) | 1372 | if (pipe_ctx->surface != surface) |
@@ -1389,7 +1390,7 @@ void dc_update_surfaces_and_stream(struct dc *dc, | |||
1389 | context_timing_trace(dc, &context->res_ctx); | 1390 | context_timing_trace(dc, &context->res_ctx); |
1390 | } | 1391 | } |
1391 | 1392 | ||
1392 | for (j = 0; j < context->res_ctx.pool->pipe_count; j++) { | 1393 | for (j = 0; j < core_dc->res_pool->pipe_count; j++) { |
1393 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; | 1394 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; |
1394 | struct pipe_ctx *cur_pipe_ctx; | 1395 | struct pipe_ctx *cur_pipe_ctx; |
1395 | bool is_new_pipe_surface = true; | 1396 | bool is_new_pipe_surface = true; |
@@ -1427,7 +1428,7 @@ void dc_update_surfaces_and_stream(struct dc *dc, | |||
1427 | } | 1428 | } |
1428 | 1429 | ||
1429 | /* Unlock pipes */ | 1430 | /* Unlock pipes */ |
1430 | for (i = context->res_ctx.pool->pipe_count - 1; i >= 0; i--) { | 1431 | for (i = core_dc->res_pool->pipe_count - 1; i >= 0; i--) { |
1431 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 1432 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
1432 | 1433 | ||
1433 | for (j = 0; j < surface_count; j++) { | 1434 | for (j = 0; j < surface_count; j++) { |
@@ -1571,8 +1572,6 @@ void dc_set_power_state( | |||
1571 | memset(core_dc->current_context, 0, | 1572 | memset(core_dc->current_context, 0, |
1572 | sizeof(*core_dc->current_context)); | 1573 | sizeof(*core_dc->current_context)); |
1573 | 1574 | ||
1574 | core_dc->current_context->res_ctx.pool = core_dc->res_pool; | ||
1575 | |||
1576 | break; | 1575 | break; |
1577 | } | 1576 | } |
1578 | 1577 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c index f883fdb820c8..4b9d3f12406f 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | |||
@@ -2245,7 +2245,7 @@ static void set_crtc_test_pattern(struct core_link *link, | |||
2245 | case DP_TEST_PATTERN_VIDEO_MODE: | 2245 | case DP_TEST_PATTERN_VIDEO_MODE: |
2246 | { | 2246 | { |
2247 | /* restore bitdepth reduction */ | 2247 | /* restore bitdepth reduction */ |
2248 | link->dc->current_context->res_ctx.pool->funcs-> | 2248 | link->dc->res_pool->funcs-> |
2249 | build_bit_depth_reduction_params(pipe_ctx->stream, | 2249 | build_bit_depth_reduction_params(pipe_ctx->stream, |
2250 | ¶ms); | 2250 | ¶ms); |
2251 | pipe_ctx->stream->bit_depth_params = params; | 2251 | pipe_ctx->stream->bit_depth_params = params; |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index cdb98d5f7caa..43e5758719ca 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c | |||
@@ -233,11 +233,12 @@ bool resource_construct( | |||
233 | 233 | ||
234 | void resource_unreference_clock_source( | 234 | void resource_unreference_clock_source( |
235 | struct resource_context *res_ctx, | 235 | struct resource_context *res_ctx, |
236 | const struct resource_pool *pool, | ||
236 | struct clock_source **clock_source) | 237 | struct clock_source **clock_source) |
237 | { | 238 | { |
238 | int i; | 239 | int i; |
239 | for (i = 0; i < res_ctx->pool->clk_src_count; i++) { | 240 | for (i = 0; i < pool->clk_src_count; i++) { |
240 | if (res_ctx->pool->clock_sources[i] != *clock_source) | 241 | if (pool->clock_sources[i] != *clock_source) |
241 | continue; | 242 | continue; |
242 | 243 | ||
243 | res_ctx->clock_source_ref_count[i]--; | 244 | res_ctx->clock_source_ref_count[i]--; |
@@ -248,7 +249,7 @@ void resource_unreference_clock_source( | |||
248 | break; | 249 | break; |
249 | } | 250 | } |
250 | 251 | ||
251 | if (res_ctx->pool->dp_clock_source == *clock_source) { | 252 | if (pool->dp_clock_source == *clock_source) { |
252 | res_ctx->dp_clock_source_ref_count--; | 253 | res_ctx->dp_clock_source_ref_count--; |
253 | 254 | ||
254 | if (res_ctx->dp_clock_source_ref_count == 0) | 255 | if (res_ctx->dp_clock_source_ref_count == 0) |
@@ -259,18 +260,19 @@ void resource_unreference_clock_source( | |||
259 | 260 | ||
260 | void resource_reference_clock_source( | 261 | void resource_reference_clock_source( |
261 | struct resource_context *res_ctx, | 262 | struct resource_context *res_ctx, |
263 | const struct resource_pool *pool, | ||
262 | struct clock_source *clock_source) | 264 | struct clock_source *clock_source) |
263 | { | 265 | { |
264 | int i; | 266 | int i; |
265 | for (i = 0; i < res_ctx->pool->clk_src_count; i++) { | 267 | for (i = 0; i < pool->clk_src_count; i++) { |
266 | if (res_ctx->pool->clock_sources[i] != clock_source) | 268 | if (pool->clock_sources[i] != clock_source) |
267 | continue; | 269 | continue; |
268 | 270 | ||
269 | res_ctx->clock_source_ref_count[i]++; | 271 | res_ctx->clock_source_ref_count[i]++; |
270 | break; | 272 | break; |
271 | } | 273 | } |
272 | 274 | ||
273 | if (res_ctx->pool->dp_clock_source == clock_source) | 275 | if (pool->dp_clock_source == clock_source) |
274 | res_ctx->dp_clock_source_ref_count++; | 276 | res_ctx->dp_clock_source_ref_count++; |
275 | } | 277 | } |
276 | 278 | ||
@@ -861,12 +863,13 @@ enum dc_status resource_build_scaling_params_for_context( | |||
861 | 863 | ||
862 | static void detach_surfaces_for_stream( | 864 | static void detach_surfaces_for_stream( |
863 | struct validate_context *context, | 865 | struct validate_context *context, |
866 | const struct resource_pool *pool, | ||
864 | const struct dc_stream *dc_stream) | 867 | const struct dc_stream *dc_stream) |
865 | { | 868 | { |
866 | int i; | 869 | int i; |
867 | struct core_stream *stream = DC_STREAM_TO_CORE(dc_stream); | 870 | struct core_stream *stream = DC_STREAM_TO_CORE(dc_stream); |
868 | 871 | ||
869 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) { | 872 | for (i = 0; i < pool->pipe_count; i++) { |
870 | struct pipe_ctx *cur_pipe = &context->res_ctx.pipe_ctx[i]; | 873 | struct pipe_ctx *cur_pipe = &context->res_ctx.pipe_ctx[i]; |
871 | if (cur_pipe->stream == stream) { | 874 | if (cur_pipe->stream == stream) { |
872 | cur_pipe->surface = NULL; | 875 | cur_pipe->surface = NULL; |
@@ -876,7 +879,9 @@ static void detach_surfaces_for_stream( | |||
876 | } | 879 | } |
877 | } | 880 | } |
878 | 881 | ||
879 | struct pipe_ctx *find_idle_secondary_pipe(struct resource_context *res_ctx) | 882 | struct pipe_ctx *find_idle_secondary_pipe( |
883 | struct resource_context *res_ctx, | ||
884 | const struct resource_pool *pool) | ||
880 | { | 885 | { |
881 | int i; | 886 | int i; |
882 | struct pipe_ctx *secondary_pipe = NULL; | 887 | struct pipe_ctx *secondary_pipe = NULL; |
@@ -886,7 +891,7 @@ struct pipe_ctx *find_idle_secondary_pipe(struct resource_context *res_ctx) | |||
886 | * assignment more consistent | 891 | * assignment more consistent |
887 | */ | 892 | */ |
888 | 893 | ||
889 | for (i = res_ctx->pool->pipe_count - 1; i >= 0; i--) { | 894 | for (i = pool->pipe_count - 1; i >= 0; i--) { |
890 | if (res_ctx->pipe_ctx[i].stream == NULL) { | 895 | if (res_ctx->pipe_ctx[i].stream == NULL) { |
891 | secondary_pipe = &res_ctx->pipe_ctx[i]; | 896 | secondary_pipe = &res_ctx->pipe_ctx[i]; |
892 | secondary_pipe->pipe_idx = i; | 897 | secondary_pipe->pipe_idx = i; |
@@ -903,7 +908,7 @@ struct pipe_ctx *resource_get_head_pipe_for_stream( | |||
903 | const struct core_stream *stream) | 908 | const struct core_stream *stream) |
904 | { | 909 | { |
905 | int i; | 910 | int i; |
906 | for (i = 0; i < res_ctx->pool->pipe_count; i++) { | 911 | for (i = 0; i < MAX_PIPES; i++) { |
907 | if (res_ctx->pipe_ctx[i].stream == stream && | 912 | if (res_ctx->pipe_ctx[i].stream == stream && |
908 | res_ctx->pipe_ctx[i].stream_enc) { | 913 | res_ctx->pipe_ctx[i].stream_enc) { |
909 | return &res_ctx->pipe_ctx[i]; | 914 | return &res_ctx->pipe_ctx[i]; |
@@ -919,6 +924,7 @@ struct pipe_ctx *resource_get_head_pipe_for_stream( | |||
919 | */ | 924 | */ |
920 | static struct pipe_ctx *acquire_free_pipe_for_stream( | 925 | static struct pipe_ctx *acquire_free_pipe_for_stream( |
921 | struct validate_context *context, | 926 | struct validate_context *context, |
927 | const struct resource_pool *pool, | ||
922 | const struct dc_stream *dc_stream) | 928 | const struct dc_stream *dc_stream) |
923 | { | 929 | { |
924 | int i; | 930 | int i; |
@@ -938,7 +944,7 @@ static struct pipe_ctx *acquire_free_pipe_for_stream( | |||
938 | return head_pipe; | 944 | return head_pipe; |
939 | 945 | ||
940 | /* Re-use pipe already acquired for this stream if available*/ | 946 | /* Re-use pipe already acquired for this stream if available*/ |
941 | for (i = res_ctx->pool->pipe_count - 1; i >= 0; i--) { | 947 | for (i = pool->pipe_count - 1; i >= 0; i--) { |
942 | if (res_ctx->pipe_ctx[i].stream == stream && | 948 | if (res_ctx->pipe_ctx[i].stream == stream && |
943 | !res_ctx->pipe_ctx[i].surface) { | 949 | !res_ctx->pipe_ctx[i].surface) { |
944 | return &res_ctx->pipe_ctx[i]; | 950 | return &res_ctx->pipe_ctx[i]; |
@@ -950,10 +956,10 @@ static struct pipe_ctx *acquire_free_pipe_for_stream( | |||
950 | * to acquire an idle one to satisfy the request | 956 | * to acquire an idle one to satisfy the request |
951 | */ | 957 | */ |
952 | 958 | ||
953 | if(!res_ctx->pool->funcs->acquire_idle_pipe_for_layer) | 959 | if (!pool->funcs->acquire_idle_pipe_for_layer) |
954 | return NULL; | 960 | return NULL; |
955 | 961 | ||
956 | return res_ctx->pool->funcs->acquire_idle_pipe_for_layer(context, stream); | 962 | return pool->funcs->acquire_idle_pipe_for_layer(context, pool, stream); |
957 | 963 | ||
958 | } | 964 | } |
959 | 965 | ||
@@ -964,7 +970,7 @@ static void release_free_pipes_for_stream( | |||
964 | int i; | 970 | int i; |
965 | struct core_stream *stream = DC_STREAM_TO_CORE(dc_stream); | 971 | struct core_stream *stream = DC_STREAM_TO_CORE(dc_stream); |
966 | 972 | ||
967 | for (i = res_ctx->pool->pipe_count - 1; i >= 0; i--) { | 973 | for (i = MAX_PIPES - 1; i >= 0; i--) { |
968 | if (res_ctx->pipe_ctx[i].stream == stream && | 974 | if (res_ctx->pipe_ctx[i].stream == stream && |
969 | !res_ctx->pipe_ctx[i].surface) { | 975 | !res_ctx->pipe_ctx[i].surface) { |
970 | res_ctx->pipe_ctx[i].stream = NULL; | 976 | res_ctx->pipe_ctx[i].stream = NULL; |
@@ -976,7 +982,8 @@ bool resource_attach_surfaces_to_context( | |||
976 | const struct dc_surface * const *surfaces, | 982 | const struct dc_surface * const *surfaces, |
977 | int surface_count, | 983 | int surface_count, |
978 | const struct dc_stream *dc_stream, | 984 | const struct dc_stream *dc_stream, |
979 | struct validate_context *context) | 985 | struct validate_context *context, |
986 | const struct resource_pool *pool) | ||
980 | { | 987 | { |
981 | int i; | 988 | int i; |
982 | struct pipe_ctx *tail_pipe; | 989 | struct pipe_ctx *tail_pipe; |
@@ -1003,7 +1010,7 @@ bool resource_attach_surfaces_to_context( | |||
1003 | for (i = 0; i < surface_count; i++) | 1010 | for (i = 0; i < surface_count; i++) |
1004 | dc_surface_retain(surfaces[i]); | 1011 | dc_surface_retain(surfaces[i]); |
1005 | 1012 | ||
1006 | detach_surfaces_for_stream(context, dc_stream); | 1013 | detach_surfaces_for_stream(context, pool, dc_stream); |
1007 | 1014 | ||
1008 | /* release existing surfaces*/ | 1015 | /* release existing surfaces*/ |
1009 | for (i = 0; i < stream_status->surface_count; i++) | 1016 | for (i = 0; i < stream_status->surface_count; i++) |
@@ -1020,7 +1027,8 @@ bool resource_attach_surfaces_to_context( | |||
1020 | tail_pipe = NULL; | 1027 | tail_pipe = NULL; |
1021 | for (i = 0; i < surface_count; i++) { | 1028 | for (i = 0; i < surface_count; i++) { |
1022 | struct core_surface *surface = DC_SURFACE_TO_CORE(surfaces[i]); | 1029 | struct core_surface *surface = DC_SURFACE_TO_CORE(surfaces[i]); |
1023 | struct pipe_ctx *free_pipe = acquire_free_pipe_for_stream(context, dc_stream); | 1030 | struct pipe_ctx *free_pipe = acquire_free_pipe_for_stream( |
1031 | context, pool, dc_stream); | ||
1024 | 1032 | ||
1025 | if (!free_pipe) { | 1033 | if (!free_pipe) { |
1026 | stream_status->surfaces[i] = NULL; | 1034 | stream_status->surfaces[i] = NULL; |
@@ -1101,7 +1109,8 @@ bool resource_validate_attach_surfaces( | |||
1101 | const struct dc_validation_set set[], | 1109 | const struct dc_validation_set set[], |
1102 | int set_count, | 1110 | int set_count, |
1103 | const struct validate_context *old_context, | 1111 | const struct validate_context *old_context, |
1104 | struct validate_context *context) | 1112 | struct validate_context *context, |
1113 | const struct resource_pool *pool) | ||
1105 | { | 1114 | { |
1106 | int i, j; | 1115 | int i, j; |
1107 | 1116 | ||
@@ -1114,7 +1123,7 @@ bool resource_validate_attach_surfaces( | |||
1114 | old_context->stream_status[j].surfaces, | 1123 | old_context->stream_status[j].surfaces, |
1115 | old_context->stream_status[j].surface_count, | 1124 | old_context->stream_status[j].surface_count, |
1116 | &context->streams[i]->public, | 1125 | &context->streams[i]->public, |
1117 | context)) | 1126 | context, pool)) |
1118 | return false; | 1127 | return false; |
1119 | context->stream_status[i] = old_context->stream_status[j]; | 1128 | context->stream_status[i] = old_context->stream_status[j]; |
1120 | } | 1129 | } |
@@ -1123,7 +1132,7 @@ bool resource_validate_attach_surfaces( | |||
1123 | set[i].surfaces, | 1132 | set[i].surfaces, |
1124 | set[i].surface_count, | 1133 | set[i].surface_count, |
1125 | &context->streams[i]->public, | 1134 | &context->streams[i]->public, |
1126 | context)) | 1135 | context, pool)) |
1127 | return false; | 1136 | return false; |
1128 | 1137 | ||
1129 | } | 1138 | } |
@@ -1136,12 +1145,13 @@ bool resource_validate_attach_surfaces( | |||
1136 | 1145 | ||
1137 | static void set_stream_engine_in_use( | 1146 | static void set_stream_engine_in_use( |
1138 | struct resource_context *res_ctx, | 1147 | struct resource_context *res_ctx, |
1148 | const struct resource_pool *pool, | ||
1139 | struct stream_encoder *stream_enc) | 1149 | struct stream_encoder *stream_enc) |
1140 | { | 1150 | { |
1141 | int i; | 1151 | int i; |
1142 | 1152 | ||
1143 | for (i = 0; i < res_ctx->pool->stream_enc_count; i++) { | 1153 | for (i = 0; i < pool->stream_enc_count; i++) { |
1144 | if (res_ctx->pool->stream_enc[i] == stream_enc) | 1154 | if (pool->stream_enc[i] == stream_enc) |
1145 | res_ctx->is_stream_enc_acquired[i] = true; | 1155 | res_ctx->is_stream_enc_acquired[i] = true; |
1146 | } | 1156 | } |
1147 | } | 1157 | } |
@@ -1149,32 +1159,33 @@ static void set_stream_engine_in_use( | |||
1149 | /* TODO: release audio object */ | 1159 | /* TODO: release audio object */ |
1150 | static void set_audio_in_use( | 1160 | static void set_audio_in_use( |
1151 | struct resource_context *res_ctx, | 1161 | struct resource_context *res_ctx, |
1162 | const struct resource_pool *pool, | ||
1152 | struct audio *audio) | 1163 | struct audio *audio) |
1153 | { | 1164 | { |
1154 | int i; | 1165 | int i; |
1155 | for (i = 0; i < res_ctx->pool->audio_count; i++) { | 1166 | for (i = 0; i < pool->audio_count; i++) { |
1156 | if (res_ctx->pool->audios[i] == audio) { | 1167 | if (pool->audios[i] == audio) |
1157 | res_ctx->is_audio_acquired[i] = true; | 1168 | res_ctx->is_audio_acquired[i] = true; |
1158 | } | ||
1159 | } | 1169 | } |
1160 | } | 1170 | } |
1161 | 1171 | ||
1162 | static int acquire_first_free_pipe( | 1172 | static int acquire_first_free_pipe( |
1163 | struct resource_context *res_ctx, | 1173 | struct resource_context *res_ctx, |
1174 | const struct resource_pool *pool, | ||
1164 | struct core_stream *stream) | 1175 | struct core_stream *stream) |
1165 | { | 1176 | { |
1166 | int i; | 1177 | int i; |
1167 | 1178 | ||
1168 | for (i = 0; i < res_ctx->pool->pipe_count; i++) { | 1179 | for (i = 0; i < pool->pipe_count; i++) { |
1169 | if (!res_ctx->pipe_ctx[i].stream) { | 1180 | if (!res_ctx->pipe_ctx[i].stream) { |
1170 | struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; | 1181 | struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; |
1171 | 1182 | ||
1172 | pipe_ctx->tg = res_ctx->pool->timing_generators[i]; | 1183 | pipe_ctx->tg = pool->timing_generators[i]; |
1173 | pipe_ctx->mi = res_ctx->pool->mis[i]; | 1184 | pipe_ctx->mi = pool->mis[i]; |
1174 | pipe_ctx->ipp = res_ctx->pool->ipps[i]; | 1185 | pipe_ctx->ipp = pool->ipps[i]; |
1175 | pipe_ctx->xfm = res_ctx->pool->transforms[i]; | 1186 | pipe_ctx->xfm = pool->transforms[i]; |
1176 | pipe_ctx->opp = res_ctx->pool->opps[i]; | 1187 | pipe_ctx->opp = pool->opps[i]; |
1177 | pipe_ctx->dis_clk = res_ctx->pool->display_clock; | 1188 | pipe_ctx->dis_clk = pool->display_clock; |
1178 | pipe_ctx->pipe_idx = i; | 1189 | pipe_ctx->pipe_idx = i; |
1179 | 1190 | ||
1180 | pipe_ctx->stream = stream; | 1191 | pipe_ctx->stream = stream; |
@@ -1186,21 +1197,22 @@ static int acquire_first_free_pipe( | |||
1186 | 1197 | ||
1187 | static struct stream_encoder *find_first_free_match_stream_enc_for_link( | 1198 | static struct stream_encoder *find_first_free_match_stream_enc_for_link( |
1188 | struct resource_context *res_ctx, | 1199 | struct resource_context *res_ctx, |
1200 | const struct resource_pool *pool, | ||
1189 | struct core_stream *stream) | 1201 | struct core_stream *stream) |
1190 | { | 1202 | { |
1191 | int i; | 1203 | int i; |
1192 | int j = -1; | 1204 | int j = -1; |
1193 | struct core_link *link = stream->sink->link; | 1205 | struct core_link *link = stream->sink->link; |
1194 | 1206 | ||
1195 | for (i = 0; i < res_ctx->pool->stream_enc_count; i++) { | 1207 | for (i = 0; i < pool->stream_enc_count; i++) { |
1196 | if (!res_ctx->is_stream_enc_acquired[i] && | 1208 | if (!res_ctx->is_stream_enc_acquired[i] && |
1197 | res_ctx->pool->stream_enc[i]) { | 1209 | pool->stream_enc[i]) { |
1198 | /* Store first available for MST second display | 1210 | /* Store first available for MST second display |
1199 | * in daisy chain use case */ | 1211 | * in daisy chain use case */ |
1200 | j = i; | 1212 | j = i; |
1201 | if (res_ctx->pool->stream_enc[i]->id == | 1213 | if (pool->stream_enc[i]->id == |
1202 | link->link_enc->preferred_engine) | 1214 | link->link_enc->preferred_engine) |
1203 | return res_ctx->pool->stream_enc[i]; | 1215 | return pool->stream_enc[i]; |
1204 | } | 1216 | } |
1205 | } | 1217 | } |
1206 | 1218 | ||
@@ -1218,17 +1230,19 @@ static struct stream_encoder *find_first_free_match_stream_enc_for_link( | |||
1218 | */ | 1230 | */ |
1219 | 1231 | ||
1220 | if (j >= 0 && dc_is_dp_signal(stream->signal)) | 1232 | if (j >= 0 && dc_is_dp_signal(stream->signal)) |
1221 | return res_ctx->pool->stream_enc[j]; | 1233 | return pool->stream_enc[j]; |
1222 | 1234 | ||
1223 | return NULL; | 1235 | return NULL; |
1224 | } | 1236 | } |
1225 | 1237 | ||
1226 | static struct audio *find_first_free_audio(struct resource_context *res_ctx) | 1238 | static struct audio *find_first_free_audio( |
1239 | struct resource_context *res_ctx, | ||
1240 | const struct resource_pool *pool) | ||
1227 | { | 1241 | { |
1228 | int i; | 1242 | int i; |
1229 | for (i = 0; i < res_ctx->pool->audio_count; i++) { | 1243 | for (i = 0; i < pool->audio_count; i++) { |
1230 | if (res_ctx->is_audio_acquired[i] == false) { | 1244 | if (res_ctx->is_audio_acquired[i] == false) { |
1231 | return res_ctx->pool->audios[i]; | 1245 | return pool->audios[i]; |
1232 | } | 1246 | } |
1233 | } | 1247 | } |
1234 | 1248 | ||
@@ -1358,6 +1372,7 @@ enum dc_status resource_map_pool_resources( | |||
1358 | const struct core_dc *dc, | 1372 | const struct core_dc *dc, |
1359 | struct validate_context *context) | 1373 | struct validate_context *context) |
1360 | { | 1374 | { |
1375 | const struct resource_pool *pool = dc->res_pool; | ||
1361 | int i, j; | 1376 | int i, j; |
1362 | 1377 | ||
1363 | calculate_phy_pix_clks(dc, context); | 1378 | calculate_phy_pix_clks(dc, context); |
@@ -1370,12 +1385,12 @@ enum dc_status resource_map_pool_resources( | |||
1370 | stream->bit_depth_params = | 1385 | stream->bit_depth_params = |
1371 | dc->current_context->streams[i]->bit_depth_params; | 1386 | dc->current_context->streams[i]->bit_depth_params; |
1372 | stream->clamping = dc->current_context->streams[i]->clamping; | 1387 | stream->clamping = dc->current_context->streams[i]->clamping; |
1373 | continue; | 1388 | continue; |
1389 | } | ||
1374 | } | 1390 | } |
1375 | } | ||
1376 | 1391 | ||
1377 | /* mark resources used for stream that is already active */ | 1392 | /* mark resources used for stream that is already active */ |
1378 | for (j = 0; j < MAX_PIPES; j++) { | 1393 | for (j = 0; j < pool->pipe_count; j++) { |
1379 | struct pipe_ctx *pipe_ctx = | 1394 | struct pipe_ctx *pipe_ctx = |
1380 | &context->res_ctx.pipe_ctx[j]; | 1395 | &context->res_ctx.pipe_ctx[j]; |
1381 | const struct pipe_ctx *old_pipe_ctx = | 1396 | const struct pipe_ctx *old_pipe_ctx = |
@@ -1395,7 +1410,7 @@ enum dc_status resource_map_pool_resources( | |||
1395 | continue; | 1410 | continue; |
1396 | 1411 | ||
1397 | set_stream_engine_in_use( | 1412 | set_stream_engine_in_use( |
1398 | &context->res_ctx, | 1413 | &context->res_ctx, pool, |
1399 | pipe_ctx->stream_enc); | 1414 | pipe_ctx->stream_enc); |
1400 | 1415 | ||
1401 | /* Switch to dp clock source only if there is | 1416 | /* Switch to dp clock source only if there is |
@@ -1404,15 +1419,14 @@ enum dc_status resource_map_pool_resources( | |||
1404 | */ | 1419 | */ |
1405 | if (dc_is_dp_signal(pipe_ctx->stream->signal) && | 1420 | if (dc_is_dp_signal(pipe_ctx->stream->signal) && |
1406 | !find_pll_sharable_stream(stream, context)) | 1421 | !find_pll_sharable_stream(stream, context)) |
1407 | pipe_ctx->clock_source = | 1422 | pipe_ctx->clock_source = pool->dp_clock_source; |
1408 | context->res_ctx.pool->dp_clock_source; | ||
1409 | 1423 | ||
1410 | resource_reference_clock_source( | 1424 | resource_reference_clock_source( |
1411 | &context->res_ctx, | 1425 | &context->res_ctx, pool, |
1412 | pipe_ctx->clock_source); | 1426 | pipe_ctx->clock_source); |
1413 | 1427 | ||
1414 | set_audio_in_use(&context->res_ctx, | 1428 | set_audio_in_use(&context->res_ctx, pool, |
1415 | pipe_ctx->audio); | 1429 | pipe_ctx->audio); |
1416 | } | 1430 | } |
1417 | } | 1431 | } |
1418 | 1432 | ||
@@ -1424,22 +1438,22 @@ enum dc_status resource_map_pool_resources( | |||
1424 | if (resource_is_stream_unchanged(dc->current_context, stream)) | 1438 | if (resource_is_stream_unchanged(dc->current_context, stream)) |
1425 | continue; | 1439 | continue; |
1426 | /* acquire new resources */ | 1440 | /* acquire new resources */ |
1427 | pipe_idx = acquire_first_free_pipe(&context->res_ctx, stream); | 1441 | pipe_idx = acquire_first_free_pipe( |
1442 | &context->res_ctx, pool, stream); | ||
1428 | if (pipe_idx < 0) | 1443 | if (pipe_idx < 0) |
1429 | return DC_NO_CONTROLLER_RESOURCE; | 1444 | return DC_NO_CONTROLLER_RESOURCE; |
1430 | 1445 | ||
1431 | |||
1432 | pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; | 1446 | pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; |
1433 | 1447 | ||
1434 | pipe_ctx->stream_enc = | 1448 | pipe_ctx->stream_enc = |
1435 | find_first_free_match_stream_enc_for_link( | 1449 | find_first_free_match_stream_enc_for_link( |
1436 | &context->res_ctx, stream); | 1450 | &context->res_ctx, pool, stream); |
1437 | 1451 | ||
1438 | if (!pipe_ctx->stream_enc) | 1452 | if (!pipe_ctx->stream_enc) |
1439 | return DC_NO_STREAM_ENG_RESOURCE; | 1453 | return DC_NO_STREAM_ENG_RESOURCE; |
1440 | 1454 | ||
1441 | set_stream_engine_in_use( | 1455 | set_stream_engine_in_use( |
1442 | &context->res_ctx, | 1456 | &context->res_ctx, pool, |
1443 | pipe_ctx->stream_enc); | 1457 | pipe_ctx->stream_enc); |
1444 | 1458 | ||
1445 | /* TODO: Add check if ASIC support and EDID audio */ | 1459 | /* TODO: Add check if ASIC support and EDID audio */ |
@@ -1447,7 +1461,7 @@ enum dc_status resource_map_pool_resources( | |||
1447 | dc_is_audio_capable_signal(pipe_ctx->stream->signal) && | 1461 | dc_is_audio_capable_signal(pipe_ctx->stream->signal) && |
1448 | stream->public.audio_info.mode_count) { | 1462 | stream->public.audio_info.mode_count) { |
1449 | pipe_ctx->audio = find_first_free_audio( | 1463 | pipe_ctx->audio = find_first_free_audio( |
1450 | &context->res_ctx); | 1464 | &context->res_ctx, pool); |
1451 | 1465 | ||
1452 | /* | 1466 | /* |
1453 | * Audio assigned in order first come first get. | 1467 | * Audio assigned in order first come first get. |
@@ -1456,7 +1470,7 @@ enum dc_status resource_map_pool_resources( | |||
1456 | */ | 1470 | */ |
1457 | if (pipe_ctx->audio) | 1471 | if (pipe_ctx->audio) |
1458 | set_audio_in_use( | 1472 | set_audio_in_use( |
1459 | &context->res_ctx, | 1473 | &context->res_ctx, pool, |
1460 | pipe_ctx->audio); | 1474 | pipe_ctx->audio); |
1461 | } | 1475 | } |
1462 | 1476 | ||
@@ -2077,7 +2091,7 @@ void dc_resource_validate_ctx_copy_construct( | |||
2077 | 2091 | ||
2078 | *dst_ctx = *src_ctx; | 2092 | *dst_ctx = *src_ctx; |
2079 | 2093 | ||
2080 | for (i = 0; i < dst_ctx->res_ctx.pool->pipe_count; i++) { | 2094 | for (i = 0; i < MAX_PIPES; i++) { |
2081 | struct pipe_ctx *cur_pipe = &dst_ctx->res_ctx.pipe_ctx[i]; | 2095 | struct pipe_ctx *cur_pipe = &dst_ctx->res_ctx.pipe_ctx[i]; |
2082 | 2096 | ||
2083 | if (cur_pipe->top_pipe) | 2097 | if (cur_pipe->top_pipe) |
@@ -2097,13 +2111,14 @@ void dc_resource_validate_ctx_copy_construct( | |||
2097 | } | 2111 | } |
2098 | 2112 | ||
2099 | struct clock_source *dc_resource_find_first_free_pll( | 2113 | struct clock_source *dc_resource_find_first_free_pll( |
2100 | struct resource_context *res_ctx) | 2114 | struct resource_context *res_ctx, |
2115 | const struct resource_pool *pool) | ||
2101 | { | 2116 | { |
2102 | int i; | 2117 | int i; |
2103 | 2118 | ||
2104 | for (i = 0; i < res_ctx->pool->clk_src_count; ++i) { | 2119 | for (i = 0; i < pool->clk_src_count; ++i) { |
2105 | if (res_ctx->clock_source_ref_count[i] == 0) | 2120 | if (res_ctx->clock_source_ref_count[i] == 0) |
2106 | return res_ctx->pool->clock_sources[i]; | 2121 | return pool->clock_sources[i]; |
2107 | } | 2122 | } |
2108 | 2123 | ||
2109 | return NULL; | 2124 | return NULL; |
@@ -2151,6 +2166,7 @@ enum dc_status resource_map_clock_resources( | |||
2151 | struct validate_context *context) | 2166 | struct validate_context *context) |
2152 | { | 2167 | { |
2153 | int i, j; | 2168 | int i, j; |
2169 | const struct resource_pool *pool = dc->res_pool; | ||
2154 | 2170 | ||
2155 | /* acquire new resources */ | 2171 | /* acquire new resources */ |
2156 | for (i = 0; i < context->stream_count; i++) { | 2172 | for (i = 0; i < context->stream_count; i++) { |
@@ -2168,8 +2184,7 @@ enum dc_status resource_map_clock_resources( | |||
2168 | 2184 | ||
2169 | if (dc_is_dp_signal(pipe_ctx->stream->signal) | 2185 | if (dc_is_dp_signal(pipe_ctx->stream->signal) |
2170 | || pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL) | 2186 | || pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL) |
2171 | pipe_ctx->clock_source = | 2187 | pipe_ctx->clock_source = pool->dp_clock_source; |
2172 | context->res_ctx.pool->dp_clock_source; | ||
2173 | else { | 2188 | else { |
2174 | pipe_ctx->clock_source = NULL; | 2189 | pipe_ctx->clock_source = NULL; |
2175 | 2190 | ||
@@ -2180,14 +2195,16 @@ enum dc_status resource_map_clock_resources( | |||
2180 | 2195 | ||
2181 | if (pipe_ctx->clock_source == NULL) | 2196 | if (pipe_ctx->clock_source == NULL) |
2182 | pipe_ctx->clock_source = | 2197 | pipe_ctx->clock_source = |
2183 | dc_resource_find_first_free_pll(&context->res_ctx); | 2198 | dc_resource_find_first_free_pll( |
2199 | &context->res_ctx, | ||
2200 | pool); | ||
2184 | } | 2201 | } |
2185 | 2202 | ||
2186 | if (pipe_ctx->clock_source == NULL) | 2203 | if (pipe_ctx->clock_source == NULL) |
2187 | return DC_NO_CLOCK_SOURCE_RESOURCE; | 2204 | return DC_NO_CLOCK_SOURCE_RESOURCE; |
2188 | 2205 | ||
2189 | resource_reference_clock_source( | 2206 | resource_reference_clock_source( |
2190 | &context->res_ctx, | 2207 | &context->res_ctx, pool, |
2191 | pipe_ctx->clock_source); | 2208 | pipe_ctx->clock_source); |
2192 | 2209 | ||
2193 | /* only one cs per stream regardless of mpo */ | 2210 | /* only one cs per stream regardless of mpo */ |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c index 23627b14c16c..99b6a1695f26 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c | |||
@@ -240,7 +240,7 @@ bool dc_stream_set_cursor_position( | |||
240 | struct dc_cursor_position pos_cpy = *position; | 240 | struct dc_cursor_position pos_cpy = *position; |
241 | struct dc_cursor_mi_param param = { | 241 | struct dc_cursor_mi_param param = { |
242 | .pixel_clk_khz = dc_stream->timing.pix_clk_khz, | 242 | .pixel_clk_khz = dc_stream->timing.pix_clk_khz, |
243 | .ref_clk_khz = res_ctx->pool->ref_clock_inKhz, | 243 | .ref_clk_khz = core_dc->res_pool->ref_clock_inKhz, |
244 | .viewport_x_start = pipe_ctx->scl_data.viewport.x, | 244 | .viewport_x_start = pipe_ctx->scl_data.viewport.x, |
245 | .viewport_width = pipe_ctx->scl_data.viewport.width, | 245 | .viewport_width = pipe_ctx->scl_data.viewport.width, |
246 | .h_scale_ratio = pipe_ctx->scl_data.ratios.horz | 246 | .h_scale_ratio = pipe_ctx->scl_data.ratios.horz |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c index 943895faee49..aa6ac9596235 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c | |||
@@ -138,8 +138,7 @@ const struct dc_surface_status *dc_surface_get_status( | |||
138 | if (core_dc->current_context == NULL) | 138 | if (core_dc->current_context == NULL) |
139 | return NULL; | 139 | return NULL; |
140 | 140 | ||
141 | for (i = 0; i < core_dc->current_context->res_ctx.pool->pipe_count; | 141 | for (i = 0; i < core_dc->res_pool->pipe_count; i++) { |
142 | i++) { | ||
143 | struct pipe_ctx *pipe_ctx = | 142 | struct pipe_ctx *pipe_ctx = |
144 | &core_dc->current_context->res_ctx.pipe_ctx[i]; | 143 | &core_dc->current_context->res_ctx.pipe_ctx[i]; |
145 | 144 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c index dd6f0b1bd8ae..30c197f378dc 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c | |||
@@ -132,8 +132,8 @@ void dce100_set_bandwidth( | |||
132 | bool decrease_allowed) | 132 | bool decrease_allowed) |
133 | { | 133 | { |
134 | if (decrease_allowed || context->dispclk_khz > dc->current_context->dispclk_khz) { | 134 | if (decrease_allowed || context->dispclk_khz > dc->current_context->dispclk_khz) { |
135 | context->res_ctx.pool->display_clock->funcs->set_clock( | 135 | dc->res_pool->display_clock->funcs->set_clock( |
136 | context->res_ctx.pool->display_clock, | 136 | dc->res_pool->display_clock, |
137 | context->dispclk_khz * 115 / 100); | 137 | context->dispclk_khz * 115 / 100); |
138 | dc->current_context->bw_results.dispclk_khz = context->dispclk_khz; | 138 | dc->current_context->bw_results.dispclk_khz = context->dispclk_khz; |
139 | dc->current_context->dispclk_khz = context->dispclk_khz; | 139 | dc->current_context->dispclk_khz = context->dispclk_khz; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c index f65b785220e2..f0700706d7c9 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | |||
@@ -804,8 +804,6 @@ enum dc_status dce100_validate_with_context( | |||
804 | if (!dce100_validate_surface_sets(set, set_count)) | 804 | if (!dce100_validate_surface_sets(set, set_count)) |
805 | return DC_FAIL_SURFACE_VALIDATE; | 805 | return DC_FAIL_SURFACE_VALIDATE; |
806 | 806 | ||
807 | context->res_ctx.pool = dc->res_pool; | ||
808 | |||
809 | for (i = 0; i < set_count; i++) { | 807 | for (i = 0; i < set_count; i++) { |
810 | context->streams[i] = DC_STREAM_TO_CORE(set[i].stream); | 808 | context->streams[i] = DC_STREAM_TO_CORE(set[i].stream); |
811 | dc_stream_retain(&context->streams[i]->public); | 809 | dc_stream_retain(&context->streams[i]->public); |
@@ -817,8 +815,8 @@ enum dc_status dce100_validate_with_context( | |||
817 | if (result == DC_OK) | 815 | if (result == DC_OK) |
818 | result = resource_map_clock_resources(dc, context); | 816 | result = resource_map_clock_resources(dc, context); |
819 | 817 | ||
820 | if (!resource_validate_attach_surfaces( | 818 | if (!resource_validate_attach_surfaces(set, set_count, |
821 | set, set_count, dc->current_context, context)) { | 819 | dc->current_context, context, dc->res_pool)) { |
822 | DC_ERROR("Failed to attach surface to stream!\n"); | 820 | DC_ERROR("Failed to attach surface to stream!\n"); |
823 | return DC_FAIL_ATTACH_SURFACES; | 821 | return DC_FAIL_ATTACH_SURFACES; |
824 | } | 822 | } |
@@ -843,8 +841,6 @@ enum dc_status dce100_validate_guaranteed( | |||
843 | { | 841 | { |
844 | enum dc_status result = DC_ERROR_UNEXPECTED; | 842 | enum dc_status result = DC_ERROR_UNEXPECTED; |
845 | 843 | ||
846 | context->res_ctx.pool = dc->res_pool; | ||
847 | |||
848 | context->streams[0] = DC_STREAM_TO_CORE(dc_stream); | 844 | context->streams[0] = DC_STREAM_TO_CORE(dc_stream); |
849 | dc_stream_retain(&context->streams[0]->public); | 845 | dc_stream_retain(&context->streams[0]->public); |
850 | context->stream_count++; | 846 | context->stream_count++; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 0e69aceb0bad..dc4c16416370 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | |||
@@ -1260,10 +1260,12 @@ void dce110_set_displaymarks( | |||
1260 | } | 1260 | } |
1261 | } | 1261 | } |
1262 | 1262 | ||
1263 | static void set_safe_displaymarks(struct resource_context *res_ctx) | 1263 | static void set_safe_displaymarks( |
1264 | struct resource_context *res_ctx, | ||
1265 | const struct resource_pool *pool) | ||
1264 | { | 1266 | { |
1265 | int i; | 1267 | int i; |
1266 | int underlay_idx = res_ctx->pool->underlay_pipe_index; | 1268 | int underlay_idx = pool->underlay_pipe_index; |
1267 | struct bw_watermarks max_marks = { | 1269 | struct bw_watermarks max_marks = { |
1268 | MAX_WATERMARK, MAX_WATERMARK, MAX_WATERMARK, MAX_WATERMARK }; | 1270 | MAX_WATERMARK, MAX_WATERMARK, MAX_WATERMARK, MAX_WATERMARK }; |
1269 | struct bw_watermarks nbp_marks = { | 1271 | struct bw_watermarks nbp_marks = { |
@@ -1308,9 +1310,11 @@ static void switch_dp_clock_sources( | |||
1308 | if (clk_src && | 1310 | if (clk_src && |
1309 | clk_src != pipe_ctx->clock_source) { | 1311 | clk_src != pipe_ctx->clock_source) { |
1310 | resource_unreference_clock_source( | 1312 | resource_unreference_clock_source( |
1311 | res_ctx, &pipe_ctx->clock_source); | 1313 | res_ctx, dc->res_pool, |
1314 | &pipe_ctx->clock_source); | ||
1312 | pipe_ctx->clock_source = clk_src; | 1315 | pipe_ctx->clock_source = clk_src; |
1313 | resource_reference_clock_source(res_ctx, clk_src); | 1316 | resource_reference_clock_source( |
1317 | res_ctx, dc->res_pool, clk_src); | ||
1314 | 1318 | ||
1315 | dce_crtc_switch_to_clk_src(dc->hwseq, clk_src, i); | 1319 | dce_crtc_switch_to_clk_src(dc->hwseq, clk_src, i); |
1316 | } | 1320 | } |
@@ -1336,8 +1340,8 @@ static void reset_single_pipe_hw_ctx( | |||
1336 | pipe_ctx->tg->funcs->disable_crtc(pipe_ctx->tg); | 1340 | pipe_ctx->tg->funcs->disable_crtc(pipe_ctx->tg); |
1337 | pipe_ctx->mi->funcs->free_mem_input( | 1341 | pipe_ctx->mi->funcs->free_mem_input( |
1338 | pipe_ctx->mi, context->stream_count); | 1342 | pipe_ctx->mi, context->stream_count); |
1339 | resource_unreference_clock_source( | 1343 | resource_unreference_clock_source(&context->res_ctx, dc->res_pool, |
1340 | &context->res_ctx, &pipe_ctx->clock_source); | 1344 | &pipe_ctx->clock_source); |
1341 | 1345 | ||
1342 | dc->hwss.power_down_front_end((struct core_dc *)dc, pipe_ctx); | 1346 | dc->hwss.power_down_front_end((struct core_dc *)dc, pipe_ctx); |
1343 | 1347 | ||
@@ -1530,7 +1534,7 @@ static enum dc_status apply_ctx_to_hw_fpga( | |||
1530 | enum dc_status status = DC_ERROR_UNEXPECTED; | 1534 | enum dc_status status = DC_ERROR_UNEXPECTED; |
1531 | int i; | 1535 | int i; |
1532 | 1536 | ||
1533 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) { | 1537 | for (i = 0; i < MAX_PIPES; i++) { |
1534 | struct pipe_ctx *pipe_ctx_old = | 1538 | struct pipe_ctx *pipe_ctx_old = |
1535 | &dc->current_context->res_ctx.pipe_ctx[i]; | 1539 | &dc->current_context->res_ctx.pipe_ctx[i]; |
1536 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 1540 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
@@ -1561,7 +1565,7 @@ static void reset_hw_ctx_wrap( | |||
1561 | 1565 | ||
1562 | /* Reset old context */ | 1566 | /* Reset old context */ |
1563 | /* look up the targets that have been removed since last commit */ | 1567 | /* look up the targets that have been removed since last commit */ |
1564 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) { | 1568 | for (i = 0; i < MAX_PIPES; i++) { |
1565 | struct pipe_ctx *pipe_ctx_old = | 1569 | struct pipe_ctx *pipe_ctx_old = |
1566 | &dc->current_context->res_ctx.pipe_ctx[i]; | 1570 | &dc->current_context->res_ctx.pipe_ctx[i]; |
1567 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 1571 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
@@ -1609,7 +1613,7 @@ enum dc_status dce110_apply_ctx_to_hw( | |||
1609 | dcb->funcs->set_scratch_critical_state(dcb, true); | 1613 | dcb->funcs->set_scratch_critical_state(dcb, true); |
1610 | 1614 | ||
1611 | /* below is for real asic only */ | 1615 | /* below is for real asic only */ |
1612 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) { | 1616 | for (i = 0; i < dc->res_pool->pipe_count; i++) { |
1613 | struct pipe_ctx *pipe_ctx_old = | 1617 | struct pipe_ctx *pipe_ctx_old = |
1614 | &dc->current_context->res_ctx.pipe_ctx[i]; | 1618 | &dc->current_context->res_ctx.pipe_ctx[i]; |
1615 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 1619 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
@@ -1629,14 +1633,14 @@ enum dc_status dce110_apply_ctx_to_hw( | |||
1629 | PIPE_GATING_CONTROL_DISABLE); | 1633 | PIPE_GATING_CONTROL_DISABLE); |
1630 | } | 1634 | } |
1631 | 1635 | ||
1632 | set_safe_displaymarks(&context->res_ctx); | 1636 | set_safe_displaymarks(&context->res_ctx, dc->res_pool); |
1633 | /*TODO: when pplib works*/ | 1637 | /*TODO: when pplib works*/ |
1634 | apply_min_clocks(dc, context, &clocks_state, true); | 1638 | apply_min_clocks(dc, context, &clocks_state, true); |
1635 | 1639 | ||
1636 | if (context->dispclk_khz | 1640 | if (context->dispclk_khz |
1637 | > dc->current_context->dispclk_khz) { | 1641 | > dc->current_context->dispclk_khz) { |
1638 | context->res_ctx.pool->display_clock->funcs->set_clock( | 1642 | dc->res_pool->display_clock->funcs->set_clock( |
1639 | context->res_ctx.pool->display_clock, | 1643 | dc->res_pool->display_clock, |
1640 | context->dispclk_khz * 115 / 100); | 1644 | context->dispclk_khz * 115 / 100); |
1641 | } | 1645 | } |
1642 | /* program audio wall clock. use HDMI as clock source if HDMI | 1646 | /* program audio wall clock. use HDMI as clock source if HDMI |
@@ -1658,7 +1662,7 @@ enum dc_status dce110_apply_ctx_to_hw( | |||
1658 | * find first available pipe with audio, setup audio wall DTO per topology | 1662 | * find first available pipe with audio, setup audio wall DTO per topology |
1659 | * instead of per pipe. | 1663 | * instead of per pipe. |
1660 | */ | 1664 | */ |
1661 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) { | 1665 | for (i = 0; i < dc->res_pool->pipe_count; i++) { |
1662 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 1666 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
1663 | 1667 | ||
1664 | if (pipe_ctx->stream == NULL) | 1668 | if (pipe_ctx->stream == NULL) |
@@ -1685,8 +1689,8 @@ enum dc_status dce110_apply_ctx_to_hw( | |||
1685 | } | 1689 | } |
1686 | 1690 | ||
1687 | /* no HDMI audio is found, try DP audio */ | 1691 | /* no HDMI audio is found, try DP audio */ |
1688 | if (i == context->res_ctx.pool->pipe_count) { | 1692 | if (i == dc->res_pool->pipe_count) { |
1689 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) { | 1693 | for (i = 0; i < dc->res_pool->pipe_count; i++) { |
1690 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 1694 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
1691 | 1695 | ||
1692 | if (pipe_ctx->stream == NULL) | 1696 | if (pipe_ctx->stream == NULL) |
@@ -1713,7 +1717,7 @@ enum dc_status dce110_apply_ctx_to_hw( | |||
1713 | } | 1717 | } |
1714 | } | 1718 | } |
1715 | 1719 | ||
1716 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) { | 1720 | for (i = 0; i < dc->res_pool->pipe_count; i++) { |
1717 | struct pipe_ctx *pipe_ctx_old = | 1721 | struct pipe_ctx *pipe_ctx_old = |
1718 | &dc->current_context->res_ctx.pipe_ctx[i]; | 1722 | &dc->current_context->res_ctx.pipe_ctx[i]; |
1719 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 1723 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
@@ -2297,8 +2301,8 @@ static void dce110_set_bandwidth( | |||
2297 | dce110_set_displaymarks(dc, context); | 2301 | dce110_set_displaymarks(dc, context); |
2298 | 2302 | ||
2299 | if (decrease_allowed || context->dispclk_khz > dc->current_context->dispclk_khz) { | 2303 | if (decrease_allowed || context->dispclk_khz > dc->current_context->dispclk_khz) { |
2300 | context->res_ctx.pool->display_clock->funcs->set_clock( | 2304 | dc->res_pool->display_clock->funcs->set_clock( |
2301 | context->res_ctx.pool->display_clock, | 2305 | dc->res_pool->display_clock, |
2302 | context->dispclk_khz * 115 / 100); | 2306 | context->dispclk_khz * 115 / 100); |
2303 | dc->current_context->bw_results.dispclk_khz = context->dispclk_khz; | 2307 | dc->current_context->bw_results.dispclk_khz = context->dispclk_khz; |
2304 | dc->current_context->dispclk_khz = context->dispclk_khz; | 2308 | dc->current_context->dispclk_khz = context->dispclk_khz; |
@@ -2446,7 +2450,7 @@ static void dce110_apply_ctx_for_surface( | |||
2446 | if (!surface) | 2450 | if (!surface) |
2447 | return; | 2451 | return; |
2448 | 2452 | ||
2449 | for (i = 0; i < context->res_ctx.pool->pipe_count; i++) { | 2453 | for (i = 0; i < dc->res_pool->pipe_count; i++) { |
2450 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 2454 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
2451 | 2455 | ||
2452 | if (pipe_ctx->surface != surface) | 2456 | if (pipe_ctx->surface != surface) |
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c index 8dec9a5602a9..122f2d03afc0 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | |||
@@ -866,7 +866,7 @@ static enum dc_status validate_mapped_resource( | |||
866 | continue; | 866 | continue; |
867 | 867 | ||
868 | if (!is_surface_pixel_format_supported(pipe_ctx, | 868 | if (!is_surface_pixel_format_supported(pipe_ctx, |
869 | context->res_ctx.pool->underlay_pipe_index)) | 869 | dc->res_pool->underlay_pipe_index)) |
870 | return DC_SURFACE_PIXEL_FORMAT_UNSUPPORTED; | 870 | return DC_SURFACE_PIXEL_FORMAT_UNSUPPORTED; |
871 | 871 | ||
872 | if (!pipe_ctx->tg->funcs->validate_timing( | 872 | if (!pipe_ctx->tg->funcs->validate_timing( |
@@ -918,7 +918,7 @@ bool dce110_validate_bandwidth( | |||
918 | &dc->bw_dceip, | 918 | &dc->bw_dceip, |
919 | &dc->bw_vbios, | 919 | &dc->bw_vbios, |
920 | context->res_ctx.pipe_ctx, | 920 | context->res_ctx.pipe_ctx, |
921 | context->res_ctx.pool->pipe_count, | 921 | dc->res_pool->pipe_count, |
922 | &context->bw_results)) | 922 | &context->bw_results)) |
923 | result = true; | 923 | result = true; |
924 | context->dispclk_khz = context->bw_results.dispclk_khz; | 924 | context->dispclk_khz = context->bw_results.dispclk_khz; |
@@ -1030,8 +1030,6 @@ enum dc_status dce110_validate_with_context( | |||
1030 | if (!dce110_validate_surface_sets(set, set_count)) | 1030 | if (!dce110_validate_surface_sets(set, set_count)) |
1031 | return DC_FAIL_SURFACE_VALIDATE; | 1031 | return DC_FAIL_SURFACE_VALIDATE; |
1032 | 1032 | ||
1033 | context->res_ctx.pool = dc->res_pool; | ||
1034 | |||
1035 | for (i = 0; i < set_count; i++) { | 1033 | for (i = 0; i < set_count; i++) { |
1036 | context->streams[i] = DC_STREAM_TO_CORE(set[i].stream); | 1034 | context->streams[i] = DC_STREAM_TO_CORE(set[i].stream); |
1037 | dc_stream_retain(&context->streams[i]->public); | 1035 | dc_stream_retain(&context->streams[i]->public); |
@@ -1043,8 +1041,8 @@ enum dc_status dce110_validate_with_context( | |||
1043 | if (result == DC_OK) | 1041 | if (result == DC_OK) |
1044 | result = resource_map_clock_resources(dc, context); | 1042 | result = resource_map_clock_resources(dc, context); |
1045 | 1043 | ||
1046 | if (!resource_validate_attach_surfaces( | 1044 | if (!resource_validate_attach_surfaces(set, set_count, |
1047 | set, set_count, dc->current_context, context)) { | 1045 | dc->current_context, context, dc->res_pool)) { |
1048 | DC_ERROR("Failed to attach surface to stream!\n"); | 1046 | DC_ERROR("Failed to attach surface to stream!\n"); |
1049 | return DC_FAIL_ATTACH_SURFACES; | 1047 | return DC_FAIL_ATTACH_SURFACES; |
1050 | } | 1048 | } |
@@ -1069,8 +1067,6 @@ enum dc_status dce110_validate_guaranteed( | |||
1069 | { | 1067 | { |
1070 | enum dc_status result = DC_ERROR_UNEXPECTED; | 1068 | enum dc_status result = DC_ERROR_UNEXPECTED; |
1071 | 1069 | ||
1072 | context->res_ctx.pool = dc->res_pool; | ||
1073 | |||
1074 | context->streams[0] = DC_STREAM_TO_CORE(dc_stream); | 1070 | context->streams[0] = DC_STREAM_TO_CORE(dc_stream); |
1075 | dc_stream_retain(&context->streams[0]->public); | 1071 | dc_stream_retain(&context->streams[0]->public); |
1076 | context->stream_count++; | 1072 | context->stream_count++; |
@@ -1098,22 +1094,23 @@ enum dc_status dce110_validate_guaranteed( | |||
1098 | 1094 | ||
1099 | static struct pipe_ctx *dce110_acquire_underlay( | 1095 | static struct pipe_ctx *dce110_acquire_underlay( |
1100 | struct validate_context *context, | 1096 | struct validate_context *context, |
1097 | const struct resource_pool *pool, | ||
1101 | struct core_stream *stream) | 1098 | struct core_stream *stream) |
1102 | { | 1099 | { |
1103 | struct core_dc *dc = DC_TO_CORE(stream->ctx->dc); | 1100 | struct core_dc *dc = DC_TO_CORE(stream->ctx->dc); |
1104 | struct resource_context *res_ctx = &context->res_ctx; | 1101 | struct resource_context *res_ctx = &context->res_ctx; |
1105 | unsigned int underlay_idx = res_ctx->pool->underlay_pipe_index; | 1102 | unsigned int underlay_idx = pool->underlay_pipe_index; |
1106 | struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[underlay_idx]; | 1103 | struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[underlay_idx]; |
1107 | 1104 | ||
1108 | if (res_ctx->pipe_ctx[underlay_idx].stream) | 1105 | if (res_ctx->pipe_ctx[underlay_idx].stream) |
1109 | return NULL; | 1106 | return NULL; |
1110 | 1107 | ||
1111 | pipe_ctx->tg = res_ctx->pool->timing_generators[underlay_idx]; | 1108 | pipe_ctx->tg = pool->timing_generators[underlay_idx]; |
1112 | pipe_ctx->mi = res_ctx->pool->mis[underlay_idx]; | 1109 | pipe_ctx->mi = pool->mis[underlay_idx]; |
1113 | /*pipe_ctx->ipp = res_ctx->pool->ipps[underlay_idx];*/ | 1110 | /*pipe_ctx->ipp = res_ctx->pool->ipps[underlay_idx];*/ |
1114 | pipe_ctx->xfm = res_ctx->pool->transforms[underlay_idx]; | 1111 | pipe_ctx->xfm = pool->transforms[underlay_idx]; |
1115 | pipe_ctx->opp = res_ctx->pool->opps[underlay_idx]; | 1112 | pipe_ctx->opp = pool->opps[underlay_idx]; |
1116 | pipe_ctx->dis_clk = res_ctx->pool->display_clock; | 1113 | pipe_ctx->dis_clk = pool->display_clock; |
1117 | pipe_ctx->pipe_idx = underlay_idx; | 1114 | pipe_ctx->pipe_idx = underlay_idx; |
1118 | 1115 | ||
1119 | pipe_ctx->stream = stream; | 1116 | pipe_ctx->stream = stream; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c index 4bf75afd5721..4de51a86c9ea 100644 --- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c | |||
@@ -749,22 +749,24 @@ static void destruct(struct dce110_resource_pool *pool) | |||
749 | } | 749 | } |
750 | } | 750 | } |
751 | 751 | ||
752 | static struct clock_source *find_matching_pll(struct resource_context *res_ctx, | 752 | static struct clock_source *find_matching_pll( |
753 | struct resource_context *res_ctx, | ||
754 | const struct resource_pool *pool, | ||
753 | const struct core_stream *const stream) | 755 | const struct core_stream *const stream) |
754 | { | 756 | { |
755 | switch (stream->sink->link->link_enc->transmitter) { | 757 | switch (stream->sink->link->link_enc->transmitter) { |
756 | case TRANSMITTER_UNIPHY_A: | 758 | case TRANSMITTER_UNIPHY_A: |
757 | return res_ctx->pool->clock_sources[DCE112_CLK_SRC_PLL0]; | 759 | return pool->clock_sources[DCE112_CLK_SRC_PLL0]; |
758 | case TRANSMITTER_UNIPHY_B: | 760 | case TRANSMITTER_UNIPHY_B: |
759 | return res_ctx->pool->clock_sources[DCE112_CLK_SRC_PLL1]; | 761 | return pool->clock_sources[DCE112_CLK_SRC_PLL1]; |
760 | case TRANSMITTER_UNIPHY_C: | 762 | case TRANSMITTER_UNIPHY_C: |
761 | return res_ctx->pool->clock_sources[DCE112_CLK_SRC_PLL2]; | 763 | return pool->clock_sources[DCE112_CLK_SRC_PLL2]; |
762 | case TRANSMITTER_UNIPHY_D: | 764 | case TRANSMITTER_UNIPHY_D: |
763 | return res_ctx->pool->clock_sources[DCE112_CLK_SRC_PLL3]; | 765 | return pool->clock_sources[DCE112_CLK_SRC_PLL3]; |
764 | case TRANSMITTER_UNIPHY_E: | 766 | case TRANSMITTER_UNIPHY_E: |
765 | return res_ctx->pool->clock_sources[DCE112_CLK_SRC_PLL4]; | 767 | return pool->clock_sources[DCE112_CLK_SRC_PLL4]; |
766 | case TRANSMITTER_UNIPHY_F: | 768 | case TRANSMITTER_UNIPHY_F: |
767 | return res_ctx->pool->clock_sources[DCE112_CLK_SRC_PLL5]; | 769 | return pool->clock_sources[DCE112_CLK_SRC_PLL5]; |
768 | default: | 770 | default: |
769 | return NULL; | 771 | return NULL; |
770 | }; | 772 | }; |
@@ -842,7 +844,7 @@ bool dce112_validate_bandwidth( | |||
842 | &dc->bw_dceip, | 844 | &dc->bw_dceip, |
843 | &dc->bw_vbios, | 845 | &dc->bw_vbios, |
844 | context->res_ctx.pipe_ctx, | 846 | context->res_ctx.pipe_ctx, |
845 | context->res_ctx.pool->pipe_count, | 847 | dc->res_pool->pipe_count, |
846 | &context->bw_results)) | 848 | &context->bw_results)) |
847 | result = true; | 849 | result = true; |
848 | context->dispclk_khz = context->bw_results.dispclk_khz; | 850 | context->dispclk_khz = context->bw_results.dispclk_khz; |
@@ -928,17 +930,18 @@ enum dc_status resource_map_phy_clock_resources( | |||
928 | if (dc_is_dp_signal(pipe_ctx->stream->signal) | 930 | if (dc_is_dp_signal(pipe_ctx->stream->signal) |
929 | || pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL) | 931 | || pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL) |
930 | pipe_ctx->clock_source = | 932 | pipe_ctx->clock_source = |
931 | context->res_ctx.pool->dp_clock_source; | 933 | dc->res_pool->dp_clock_source; |
932 | else | 934 | else |
933 | pipe_ctx->clock_source = | 935 | pipe_ctx->clock_source = find_matching_pll( |
934 | find_matching_pll(&context->res_ctx, | 936 | &context->res_ctx, dc->res_pool, |
935 | stream); | 937 | stream); |
936 | 938 | ||
937 | if (pipe_ctx->clock_source == NULL) | 939 | if (pipe_ctx->clock_source == NULL) |
938 | return DC_NO_CLOCK_SOURCE_RESOURCE; | 940 | return DC_NO_CLOCK_SOURCE_RESOURCE; |
939 | 941 | ||
940 | resource_reference_clock_source( | 942 | resource_reference_clock_source( |
941 | &context->res_ctx, | 943 | &context->res_ctx, |
944 | dc->res_pool, | ||
942 | pipe_ctx->clock_source); | 945 | pipe_ctx->clock_source); |
943 | 946 | ||
944 | /* only one cs per stream regardless of mpo */ | 947 | /* only one cs per stream regardless of mpo */ |
@@ -983,8 +986,6 @@ enum dc_status dce112_validate_with_context( | |||
983 | if (!dce112_validate_surface_sets(set, set_count)) | 986 | if (!dce112_validate_surface_sets(set, set_count)) |
984 | return DC_FAIL_SURFACE_VALIDATE; | 987 | return DC_FAIL_SURFACE_VALIDATE; |
985 | 988 | ||
986 | context->res_ctx.pool = dc->res_pool; | ||
987 | |||
988 | for (i = 0; i < set_count; i++) { | 989 | for (i = 0; i < set_count; i++) { |
989 | context->streams[i] = DC_STREAM_TO_CORE(set[i].stream); | 990 | context->streams[i] = DC_STREAM_TO_CORE(set[i].stream); |
990 | dc_stream_retain(&context->streams[i]->public); | 991 | dc_stream_retain(&context->streams[i]->public); |
@@ -996,8 +997,8 @@ enum dc_status dce112_validate_with_context( | |||
996 | if (result == DC_OK) | 997 | if (result == DC_OK) |
997 | result = resource_map_phy_clock_resources(dc, context); | 998 | result = resource_map_phy_clock_resources(dc, context); |
998 | 999 | ||
999 | if (!resource_validate_attach_surfaces( | 1000 | if (!resource_validate_attach_surfaces(set, set_count, |
1000 | set, set_count, dc->current_context, context)) { | 1001 | dc->current_context, context, dc->res_pool)) { |
1001 | DC_ERROR("Failed to attach surface to stream!\n"); | 1002 | DC_ERROR("Failed to attach surface to stream!\n"); |
1002 | return DC_FAIL_ATTACH_SURFACES; | 1003 | return DC_FAIL_ATTACH_SURFACES; |
1003 | } | 1004 | } |
@@ -1022,8 +1023,6 @@ enum dc_status dce112_validate_guaranteed( | |||
1022 | { | 1023 | { |
1023 | enum dc_status result = DC_ERROR_UNEXPECTED; | 1024 | enum dc_status result = DC_ERROR_UNEXPECTED; |
1024 | 1025 | ||
1025 | context->res_ctx.pool = dc->res_pool; | ||
1026 | |||
1027 | context->streams[0] = DC_STREAM_TO_CORE(dc_stream); | 1026 | context->streams[0] = DC_STREAM_TO_CORE(dc_stream); |
1028 | dc_stream_retain(&context->streams[0]->public); | 1027 | dc_stream_retain(&context->streams[0]->public); |
1029 | context->stream_count++; | 1028 | context->stream_count++; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c index d49092986d54..0aa128e5ed84 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c | |||
@@ -821,8 +821,6 @@ enum dc_status dce80_validate_with_context( | |||
821 | if (!dce80_validate_surface_sets(set, set_count)) | 821 | if (!dce80_validate_surface_sets(set, set_count)) |
822 | return DC_FAIL_SURFACE_VALIDATE; | 822 | return DC_FAIL_SURFACE_VALIDATE; |
823 | 823 | ||
824 | context->res_ctx.pool = dc->res_pool; | ||
825 | |||
826 | for (i = 0; i < set_count; i++) { | 824 | for (i = 0; i < set_count; i++) { |
827 | context->streams[i] = DC_STREAM_TO_CORE(set[i].stream); | 825 | context->streams[i] = DC_STREAM_TO_CORE(set[i].stream); |
828 | dc_stream_retain(&context->streams[i]->public); | 826 | dc_stream_retain(&context->streams[i]->public); |
@@ -834,8 +832,8 @@ enum dc_status dce80_validate_with_context( | |||
834 | if (result == DC_OK) | 832 | if (result == DC_OK) |
835 | result = resource_map_clock_resources(dc, context); | 833 | result = resource_map_clock_resources(dc, context); |
836 | 834 | ||
837 | if (!resource_validate_attach_surfaces( | 835 | if (!resource_validate_attach_surfaces(set, set_count, |
838 | set, set_count, dc->current_context, context)) { | 836 | dc->current_context, context, dc->res_pool)) { |
839 | DC_ERROR("Failed to attach surface to stream!\n"); | 837 | DC_ERROR("Failed to attach surface to stream!\n"); |
840 | return DC_FAIL_ATTACH_SURFACES; | 838 | return DC_FAIL_ATTACH_SURFACES; |
841 | } | 839 | } |
@@ -859,8 +857,6 @@ enum dc_status dce80_validate_guaranteed( | |||
859 | { | 857 | { |
860 | enum dc_status result = DC_ERROR_UNEXPECTED; | 858 | enum dc_status result = DC_ERROR_UNEXPECTED; |
861 | 859 | ||
862 | context->res_ctx.pool = dc->res_pool; | ||
863 | |||
864 | context->streams[0] = DC_STREAM_TO_CORE(dc_stream); | 860 | context->streams[0] = DC_STREAM_TO_CORE(dc_stream); |
865 | dc_stream_retain(&context->streams[0]->public); | 861 | dc_stream_retain(&context->streams[0]->public); |
866 | context->stream_count++; | 862 | context->stream_count++; |
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h index 2b43e18c65f5..f3fe850ffa13 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h | |||
@@ -212,6 +212,7 @@ struct resource_funcs { | |||
212 | 212 | ||
213 | struct pipe_ctx *(*acquire_idle_pipe_for_layer)( | 213 | struct pipe_ctx *(*acquire_idle_pipe_for_layer)( |
214 | struct validate_context *context, | 214 | struct validate_context *context, |
215 | const struct resource_pool *pool, | ||
215 | struct core_stream *stream); | 216 | struct core_stream *stream); |
216 | 217 | ||
217 | void (*build_bit_depth_reduction_params)( | 218 | void (*build_bit_depth_reduction_params)( |
@@ -293,7 +294,6 @@ struct pipe_ctx { | |||
293 | }; | 294 | }; |
294 | 295 | ||
295 | struct resource_context { | 296 | struct resource_context { |
296 | const struct resource_pool *pool; | ||
297 | struct pipe_ctx pipe_ctx[MAX_PIPES]; | 297 | struct pipe_ctx pipe_ctx[MAX_PIPES]; |
298 | bool is_stream_enc_acquired[MAX_PIPES * 2]; | 298 | bool is_stream_enc_acquired[MAX_PIPES * 2]; |
299 | bool is_audio_acquired[MAX_PIPES]; | 299 | bool is_audio_acquired[MAX_PIPES]; |
diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h index b1987cab9751..89d34bed131b 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/resource.h +++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h | |||
@@ -92,10 +92,12 @@ void resource_build_info_frame(struct pipe_ctx *pipe_ctx); | |||
92 | 92 | ||
93 | void resource_unreference_clock_source( | 93 | void resource_unreference_clock_source( |
94 | struct resource_context *res_ctx, | 94 | struct resource_context *res_ctx, |
95 | const struct resource_pool *pool, | ||
95 | struct clock_source **clock_source); | 96 | struct clock_source **clock_source); |
96 | 97 | ||
97 | void resource_reference_clock_source( | 98 | void resource_reference_clock_source( |
98 | struct resource_context *res_ctx, | 99 | struct resource_context *res_ctx, |
100 | const struct resource_pool *pool, | ||
99 | struct clock_source *clock_source); | 101 | struct clock_source *clock_source); |
100 | 102 | ||
101 | bool resource_are_streams_timing_synchronizable( | 103 | bool resource_are_streams_timing_synchronizable( |
@@ -107,7 +109,8 @@ struct clock_source *resource_find_used_clk_src_for_sharing( | |||
107 | struct pipe_ctx *pipe_ctx); | 109 | struct pipe_ctx *pipe_ctx); |
108 | 110 | ||
109 | struct clock_source *dc_resource_find_first_free_pll( | 111 | struct clock_source *dc_resource_find_first_free_pll( |
110 | struct resource_context *res_ctx); | 112 | struct resource_context *res_ctx, |
113 | const struct resource_pool *pool); | ||
111 | 114 | ||
112 | struct pipe_ctx *resource_get_head_pipe_for_stream( | 115 | struct pipe_ctx *resource_get_head_pipe_for_stream( |
113 | struct resource_context *res_ctx, | 116 | struct resource_context *res_ctx, |
@@ -117,9 +120,12 @@ bool resource_attach_surfaces_to_context( | |||
117 | const struct dc_surface *const *surfaces, | 120 | const struct dc_surface *const *surfaces, |
118 | int surface_count, | 121 | int surface_count, |
119 | const struct dc_stream *dc_stream, | 122 | const struct dc_stream *dc_stream, |
120 | struct validate_context *context); | 123 | struct validate_context *context, |
124 | const struct resource_pool *pool); | ||
121 | 125 | ||
122 | struct pipe_ctx *find_idle_secondary_pipe(struct resource_context *res_ctx); | 126 | struct pipe_ctx *find_idle_secondary_pipe( |
127 | struct resource_context *res_ctx, | ||
128 | const struct resource_pool *pool); | ||
123 | 129 | ||
124 | bool resource_is_stream_unchanged( | 130 | bool resource_is_stream_unchanged( |
125 | const struct validate_context *old_context, const struct core_stream *stream); | 131 | const struct validate_context *old_context, const struct core_stream *stream); |
@@ -131,7 +137,8 @@ bool resource_validate_attach_surfaces( | |||
131 | const struct dc_validation_set set[], | 137 | const struct dc_validation_set set[], |
132 | int set_count, | 138 | int set_count, |
133 | const struct validate_context *old_context, | 139 | const struct validate_context *old_context, |
134 | struct validate_context *context); | 140 | struct validate_context *context, |
141 | const struct resource_pool *pool); | ||
135 | 142 | ||
136 | void validate_guaranteed_copy_streams( | 143 | void validate_guaranteed_copy_streams( |
137 | struct validate_context *context, | 144 | struct validate_context *context, |