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authorMikita Lipski <mikita.lipski@amd.com>2018-05-28 11:22:17 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-05-29 14:17:10 -0400
commit7bee0572e31f1f5963ecc19d55f64f384d0b155b (patch)
tree49aa5a4b3c96eb3dbacddbc8f6c3c4fb25574a86 /drivers/gpu/drm/amd
parent10dd2b865393bb45526ca342fe69207341f89fd5 (diff)
drm/amd/pp: Add cases for getting phys and disp clks for SMU10
Add case options to retrieve either physical or display clocks with voltage from SMU controller that are needed by display driver. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index 85f84f4d8be5..e160b0577e66 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
@@ -1000,6 +1000,12 @@ static int smu10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
1000 case amd_pp_soc_clock: 1000 case amd_pp_soc_clock:
1001 pclk_vol_table = pinfo->vdd_dep_on_socclk; 1001 pclk_vol_table = pinfo->vdd_dep_on_socclk;
1002 break; 1002 break;
1003 case amd_pp_disp_clock:
1004 pclk_vol_table = pinfo->vdd_dep_on_dispclk;
1005 break;
1006 case amd_pp_phy_clock:
1007 pclk_vol_table = pinfo->vdd_dep_on_phyclk;
1008 break;
1003 default: 1009 default:
1004 return -EINVAL; 1010 return -EINVAL;
1005 } 1011 }