diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2017-05-03 03:38:58 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-05-05 18:14:44 -0400 |
commit | 652bd0c3441d861402bf7347088c846b6799c5b8 (patch) | |
tree | 8cd6bcd879c74e99527a1aa627764780ea403c74 /drivers/gpu/drm/amd | |
parent | af8baf1518d8b3d086ac6d11d8f6acd57e9cab99 (diff) |
drm/amd/powerplay: delete dead code in powerplay.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 28 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 |
2 files changed, 0 insertions, 30 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 4ad84530c88a..b3d42858f68b 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | |||
@@ -4522,32 +4522,6 @@ static int smu7_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type | |||
4522 | return 0; | 4522 | return 0; |
4523 | } | 4523 | } |
4524 | 4524 | ||
4525 | static int smu7_request_firmware(struct pp_hwmgr *hwmgr) | ||
4526 | { | ||
4527 | int ret; | ||
4528 | struct cgs_firmware_info info = {0}; | ||
4529 | |||
4530 | ret = cgs_get_firmware_info(hwmgr->device, | ||
4531 | smu7_convert_fw_type_to_cgs(UCODE_ID_SMU), | ||
4532 | &info); | ||
4533 | if (ret || !info.kptr) | ||
4534 | return -EINVAL; | ||
4535 | |||
4536 | return 0; | ||
4537 | } | ||
4538 | |||
4539 | static int smu7_release_firmware(struct pp_hwmgr *hwmgr) | ||
4540 | { | ||
4541 | int ret; | ||
4542 | |||
4543 | ret = cgs_rel_firmware(hwmgr->device, | ||
4544 | smu7_convert_fw_type_to_cgs(UCODE_ID_SMU)); | ||
4545 | if (ret) | ||
4546 | return -EINVAL; | ||
4547 | |||
4548 | return 0; | ||
4549 | } | ||
4550 | |||
4551 | static void smu7_find_min_clock_masks(struct pp_hwmgr *hwmgr, | 4525 | static void smu7_find_min_clock_masks(struct pp_hwmgr *hwmgr, |
4552 | uint32_t *sclk_mask, uint32_t *mclk_mask, | 4526 | uint32_t *sclk_mask, uint32_t *mclk_mask, |
4553 | uint32_t min_sclk, uint32_t min_mclk) | 4527 | uint32_t min_sclk, uint32_t min_mclk) |
@@ -4691,8 +4665,6 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = { | |||
4691 | .get_clock_by_type = smu7_get_clock_by_type, | 4665 | .get_clock_by_type = smu7_get_clock_by_type, |
4692 | .read_sensor = smu7_read_sensor, | 4666 | .read_sensor = smu7_read_sensor, |
4693 | .dynamic_state_management_disable = smu7_disable_dpm_tasks, | 4667 | .dynamic_state_management_disable = smu7_disable_dpm_tasks, |
4694 | .request_firmware = smu7_request_firmware, | ||
4695 | .release_firmware = smu7_release_firmware, | ||
4696 | .set_power_profile_state = smu7_set_power_profile_state, | 4668 | .set_power_profile_state = smu7_set_power_profile_state, |
4697 | .avfs_control = smu7_avfs_control, | 4669 | .avfs_control = smu7_avfs_control, |
4698 | .disable_smc_firmware_ctf = smu7_thermal_disable_alert, | 4670 | .disable_smc_firmware_ctf = smu7_thermal_disable_alert, |
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index 98d38c31f6a6..e4574c215c38 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | |||
@@ -368,8 +368,6 @@ struct pp_hwmgr_func { | |||
368 | int (*get_mclk_od)(struct pp_hwmgr *hwmgr); | 368 | int (*get_mclk_od)(struct pp_hwmgr *hwmgr); |
369 | int (*set_mclk_od)(struct pp_hwmgr *hwmgr, uint32_t value); | 369 | int (*set_mclk_od)(struct pp_hwmgr *hwmgr, uint32_t value); |
370 | int (*read_sensor)(struct pp_hwmgr *hwmgr, int idx, void *value, int *size); | 370 | int (*read_sensor)(struct pp_hwmgr *hwmgr, int idx, void *value, int *size); |
371 | int (*request_firmware)(struct pp_hwmgr *hwmgr); | ||
372 | int (*release_firmware)(struct pp_hwmgr *hwmgr); | ||
373 | int (*set_power_profile_state)(struct pp_hwmgr *hwmgr, | 371 | int (*set_power_profile_state)(struct pp_hwmgr *hwmgr, |
374 | struct amd_pp_profile *request); | 372 | struct amd_pp_profile *request); |
375 | int (*avfs_control)(struct pp_hwmgr *hwmgr, bool enable); | 373 | int (*avfs_control)(struct pp_hwmgr *hwmgr, bool enable); |