aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd
diff options
context:
space:
mode:
authorTrigger Huang <trigger.huang@amd.com>2017-04-27 03:09:31 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-05-24 17:40:06 -0400
commit63a7c7487fb20422a4a71d0bfef5ac2a69caaf68 (patch)
treee46b557b1e62bb03f427ebf19a3bf03f6fcdf4ef /drivers/gpu/drm/amd
parentfe723cd3bf277c37c555959ee75bd1429818284b (diff)
drm/amdgpu: Enable chained IB MCBP support
Support for MCBP/Virtualization in combination with chained IBs is formal released on firmware feature version #46. So enable it according to firmware feature version, otherwise, world switch will hang. Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c17
1 files changed, 11 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index ffe3ac20f290..b92d5f1657c5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -941,12 +941,6 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
941 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; 941 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data;
942 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); 942 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
943 943
944 /* chain ib ucode isn't formal released, just disable it by far
945 * TODO: when ucod ready we should use ucode version to judge if
946 * chain-ib support or not.
947 */
948 adev->virt.chained_ib_support = false;
949
950 adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); 944 adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
951 945
952 snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name); 946 snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name);
@@ -960,6 +954,17 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
960 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); 954 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
961 adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); 955 adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
962 956
957 /*
958 * Support for MCBP/Virtualization in combination with chained IBs is
959 * formal released on feature version #46
960 */
961 if (adev->gfx.ce_feature_version >= 46 &&
962 adev->gfx.pfp_feature_version >= 46) {
963 adev->virt.chained_ib_support = true;
964 DRM_INFO("Chained IB support enabled!\n");
965 } else
966 adev->virt.chained_ib_support = false;
967
963 snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); 968 snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
964 err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); 969 err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
965 if (err) 970 if (err)