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authorFlora Cui <Flora.Cui@amd.com>2016-03-14 18:33:29 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-05-04 20:27:57 -0400
commit2cc0c0b5cd4d07a65267c28a4f7b68134abff472 (patch)
tree6f989d1e7fb5706e171c08881720ba8da8734bfc /drivers/gpu/drm/amd/include
parenta3ad7a9ad8ef2e87ffa7e65d6ce0e9928b4134e9 (diff)
drm/amdgpu: change ELM/BAF to Polaris10/Polaris11
Adjust to preferred code names. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
-rw-r--r--drivers/gpu/drm/amd/include/amd_shared.h4
-rw-r--r--drivers/gpu/drm/amd/include/atombios.h6
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
index 72858a06c2dd..e56d8a378570 100644
--- a/drivers/gpu/drm/amd/include/amd_shared.h
+++ b/drivers/gpu/drm/amd/include/amd_shared.h
@@ -48,8 +48,8 @@ enum amd_asic_type {
48 CHIP_FIJI, 48 CHIP_FIJI,
49 CHIP_CARRIZO, 49 CHIP_CARRIZO,
50 CHIP_STONEY, 50 CHIP_STONEY,
51 CHIP_ELLESMERE, 51 CHIP_POLARIS10,
52 CHIP_BAFFIN, 52 CHIP_POLARIS11,
53 CHIP_LAST, 53 CHIP_LAST,
54}; 54};
55 55
diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h
index 296def32e45d..32f3e345de08 100644
--- a/drivers/gpu/drm/amd/include/atombios.h
+++ b/drivers/gpu/drm/amd/include/atombios.h
@@ -2061,7 +2061,7 @@ typedef struct _SET_DCE_CLOCK_PS_ALLOCATION_V1_1
2061#define SET_DCE_CLOCK_FLAG_DPREFCLK_BYPASS 0x01 2061#define SET_DCE_CLOCK_FLAG_DPREFCLK_BYPASS 0x01
2062#define SET_DCE_CLOCK_FLAG_ENABLE_PIXCLK 0x02 2062#define SET_DCE_CLOCK_FLAG_ENABLE_PIXCLK 0x02
2063 2063
2064// SetDCEClockTable input parameter for DCE11.2( ELM and BF ) and above 2064// SetDCEClockTable input parameter for DCE11.2( POLARIS10 and POLARIS11 ) and above
2065typedef struct _SET_DCE_CLOCK_PARAMETERS_V2_1 2065typedef struct _SET_DCE_CLOCK_PARAMETERS_V2_1
2066{ 2066{
2067 ULONG ulDCEClkFreq; // target DCE frequency in unit of 10KHZ, return real DISPCLK/DPREFCLK frequency. 2067 ULONG ulDCEClkFreq; // target DCE frequency in unit of 10KHZ, return real DISPCLK/DPREFCLK frequency.
@@ -5494,7 +5494,7 @@ typedef struct _ATOM_ASIC_PROFILING_INFO_V3_4
5494 ULONG ulReserved[8]; // Reserved for future ASIC 5494 ULONG ulReserved[8]; // Reserved for future ASIC
5495}ATOM_ASIC_PROFILING_INFO_V3_4; 5495}ATOM_ASIC_PROFILING_INFO_V3_4;
5496 5496
5497// for Ellemser/Baffin speed EVV algorithm 5497// for Polaris10/Polaris11 speed EVV algorithm
5498typedef struct _ATOM_ASIC_PROFILING_INFO_V3_5 5498typedef struct _ATOM_ASIC_PROFILING_INFO_V3_5
5499{ 5499{
5500 ATOM_COMMON_TABLE_HEADER asHeader; 5500 ATOM_COMMON_TABLE_HEADER asHeader;
@@ -5549,7 +5549,7 @@ typedef struct _ATOM_SCLK_FCW_RANGE_ENTRY_V1{
5549}ATOM_SCLK_FCW_RANGE_ENTRY_V1; 5549}ATOM_SCLK_FCW_RANGE_ENTRY_V1;
5550 5550
5551 5551
5552// SMU_InfoTable for Ellesmere/Baffin 5552// SMU_InfoTable for Polaris10/Polaris11
5553typedef struct _ATOM_SMU_INFO_V2_1 5553typedef struct _ATOM_SMU_INFO_V2_1
5554{ 5554{
5555 ATOM_COMMON_TABLE_HEADER asHeader; 5555 ATOM_COMMON_TABLE_HEADER asHeader;