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authorCharlene Liu <charlene.liu@amd.com>2017-03-01 18:20:58 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 17:18:01 -0400
commit3e337d15bf211ce1fe388d00a7f6a955550b3edf (patch)
treee6aa3d69973f19062b27c9b9b40ff37e87da57cf /drivers/gpu/drm/amd/display/modules/freesync/freesync.c
parent773d1bcae744379a03f525bfc9249d8abf0550a8 (diff)
drm/amd/display: sometime VtotalMin less than VTotal (rounding issue)
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync/freesync.c')
-rw-r--r--drivers/gpu/drm/amd/display/modules/freesync/freesync.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index 2026ef34b11b..7a0731e2dbb0 100644
--- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
+++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
@@ -905,7 +905,6 @@ void mod_freesync_notify_mode_change(struct mod_freesync *mod_freesync,
905 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 905 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
906 906
907 for (stream_index = 0; stream_index < num_streams; stream_index++) { 907 for (stream_index = 0; stream_index < num_streams; stream_index++) {
908
909 map_index = map_index_from_stream(core_freesync, 908 map_index = map_index_from_stream(core_freesync,
910 streams[stream_index]); 909 streams[stream_index]);
911 910
@@ -913,11 +912,12 @@ void mod_freesync_notify_mode_change(struct mod_freesync *mod_freesync,
913 912
914 if (core_freesync->map[map_index].caps->supported) { 913 if (core_freesync->map[map_index].caps->supported) {
915 /* Update the field rate for new timing */ 914 /* Update the field rate for new timing */
916 state->nominal_refresh_rate_in_micro_hz = 1000000 * 915 unsigned long long temp;
917 div64_u64(div64_u64((streams[stream_index]-> 916 temp = streams[stream_index]->timing.pix_clk_khz;
918 timing.pix_clk_khz * 1000), 917 temp *= 1000ULL * 1000ULL * 1000ULL;
919 streams[stream_index]->timing.v_total), 918 temp = div_u64(temp, streams[stream_index]->timing.h_total);
920 streams[stream_index]->timing.h_total); 919 temp = div_u64(temp, streams[stream_index]->timing.v_total);
920 state->nominal_refresh_rate_in_micro_hz = (unsigned int) temp;
921 921
922 /* Update the stream */ 922 /* Update the stream */
923 update_stream(core_freesync, streams[stream_index]); 923 update_stream(core_freesync, streams[stream_index]);