diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2016-12-23 01:39:41 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-01-27 11:12:53 -0500 |
commit | e5d03ac2b8bd6d738c8e1ed6ea9a6a164ce86d3c (patch) | |
tree | 161d8905066a7a90f51c890ce4075d60bc41e3fe /drivers/gpu/drm/amd/amdgpu | |
parent | db7da7aa3a8c6a25964f2216fed35f4bf11ceac1 (diff) |
drm/amd/powerplay: Unify dpm level defines
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 39 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/si_dpm.c | 10 |
5 files changed, 38 insertions, 52 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h index 955d6f21e2b3..fa2b55681422 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | |||
@@ -241,13 +241,6 @@ enum amdgpu_pcie_gen { | |||
241 | AMDGPU_PCIE_GEN_INVALID = 0xffff | 241 | AMDGPU_PCIE_GEN_INVALID = 0xffff |
242 | }; | 242 | }; |
243 | 243 | ||
244 | enum amdgpu_dpm_forced_level { | ||
245 | AMDGPU_DPM_FORCED_LEVEL_AUTO = 0, | ||
246 | AMDGPU_DPM_FORCED_LEVEL_LOW = 1, | ||
247 | AMDGPU_DPM_FORCED_LEVEL_HIGH = 2, | ||
248 | AMDGPU_DPM_FORCED_LEVEL_MANUAL = 3, | ||
249 | }; | ||
250 | |||
251 | struct amdgpu_dpm_funcs { | 244 | struct amdgpu_dpm_funcs { |
252 | int (*get_temperature)(struct amdgpu_device *adev); | 245 | int (*get_temperature)(struct amdgpu_device *adev); |
253 | int (*pre_set_power_state)(struct amdgpu_device *adev); | 246 | int (*pre_set_power_state)(struct amdgpu_device *adev); |
@@ -258,7 +251,7 @@ struct amdgpu_dpm_funcs { | |||
258 | u32 (*get_mclk)(struct amdgpu_device *adev, bool low); | 251 | u32 (*get_mclk)(struct amdgpu_device *adev, bool low); |
259 | void (*print_power_state)(struct amdgpu_device *adev, struct amdgpu_ps *ps); | 252 | void (*print_power_state)(struct amdgpu_device *adev, struct amdgpu_ps *ps); |
260 | void (*debugfs_print_current_performance_level)(struct amdgpu_device *adev, struct seq_file *m); | 253 | void (*debugfs_print_current_performance_level)(struct amdgpu_device *adev, struct seq_file *m); |
261 | int (*force_performance_level)(struct amdgpu_device *adev, enum amdgpu_dpm_forced_level level); | 254 | int (*force_performance_level)(struct amdgpu_device *adev, enum amd_dpm_forced_level level); |
262 | bool (*vblank_too_short)(struct amdgpu_device *adev); | 255 | bool (*vblank_too_short)(struct amdgpu_device *adev); |
263 | void (*powergate_uvd)(struct amdgpu_device *adev, bool gate); | 256 | void (*powergate_uvd)(struct amdgpu_device *adev, bool gate); |
264 | void (*powergate_vce)(struct amdgpu_device *adev, bool gate); | 257 | void (*powergate_vce)(struct amdgpu_device *adev, bool gate); |
@@ -353,9 +346,6 @@ struct amdgpu_dpm_funcs { | |||
353 | #define amdgpu_dpm_get_current_power_state(adev) \ | 346 | #define amdgpu_dpm_get_current_power_state(adev) \ |
354 | (adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle) | 347 | (adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle) |
355 | 348 | ||
356 | #define amdgpu_dpm_get_performance_level(adev) \ | ||
357 | (adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle) | ||
358 | |||
359 | #define amdgpu_dpm_get_pp_num_states(adev, data) \ | 349 | #define amdgpu_dpm_get_pp_num_states(adev, data) \ |
360 | (adev)->powerplay.pp_funcs->get_pp_num_states((adev)->powerplay.pp_handle, data) | 350 | (adev)->powerplay.pp_funcs->get_pp_num_states((adev)->powerplay.pp_handle, data) |
361 | 351 | ||
@@ -393,6 +383,11 @@ struct amdgpu_dpm_funcs { | |||
393 | (adev)->powerplay.pp_funcs->get_vce_clock_state((adev)->powerplay.pp_handle, (i)) : \ | 383 | (adev)->powerplay.pp_funcs->get_vce_clock_state((adev)->powerplay.pp_handle, (i)) : \ |
394 | (adev)->pm.funcs->get_vce_clock_state((adev), (i))) | 384 | (adev)->pm.funcs->get_vce_clock_state((adev), (i))) |
395 | 385 | ||
386 | #define amdgpu_dpm_get_performance_level(adev) \ | ||
387 | ((adev)->pp_enabled ? \ | ||
388 | (adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle) : \ | ||
389 | (adev)->pm.dpm.forced_level) | ||
390 | |||
396 | struct amdgpu_dpm { | 391 | struct amdgpu_dpm { |
397 | struct amdgpu_ps *ps; | 392 | struct amdgpu_ps *ps; |
398 | /* number of valid power states */ | 393 | /* number of valid power states */ |
@@ -440,7 +435,7 @@ struct amdgpu_dpm { | |||
440 | /* thermal handling */ | 435 | /* thermal handling */ |
441 | struct amdgpu_dpm_thermal thermal; | 436 | struct amdgpu_dpm_thermal thermal; |
442 | /* forced levels */ | 437 | /* forced levels */ |
443 | enum amdgpu_dpm_forced_level forced_level; | 438 | enum amd_dpm_forced_level forced_level; |
444 | }; | 439 | }; |
445 | 440 | ||
446 | struct amdgpu_pm { | 441 | struct amdgpu_pm { |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index 723ae682bf25..ccf50b8b854b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | |||
@@ -112,28 +112,19 @@ static ssize_t amdgpu_get_dpm_forced_performance_level(struct device *dev, | |||
112 | { | 112 | { |
113 | struct drm_device *ddev = dev_get_drvdata(dev); | 113 | struct drm_device *ddev = dev_get_drvdata(dev); |
114 | struct amdgpu_device *adev = ddev->dev_private; | 114 | struct amdgpu_device *adev = ddev->dev_private; |
115 | enum amd_dpm_forced_level level; | ||
115 | 116 | ||
116 | if ((adev->flags & AMD_IS_PX) && | 117 | if ((adev->flags & AMD_IS_PX) && |
117 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | 118 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) |
118 | return snprintf(buf, PAGE_SIZE, "off\n"); | 119 | return snprintf(buf, PAGE_SIZE, "off\n"); |
119 | 120 | ||
120 | if (adev->pp_enabled) { | 121 | level = amdgpu_dpm_get_performance_level(adev); |
121 | enum amd_dpm_forced_level level; | 122 | return snprintf(buf, PAGE_SIZE, "%s\n", |
122 | 123 | (level & (AMD_DPM_FORCED_LEVEL_AUTO) ? "auto" : | |
123 | level = amdgpu_dpm_get_performance_level(adev); | 124 | (level & AMD_DPM_FORCED_LEVEL_LOW) ? "low" : |
124 | return snprintf(buf, PAGE_SIZE, "%s\n", | 125 | (level & AMD_DPM_FORCED_LEVEL_HIGH) ? "high" : |
125 | (level == AMD_DPM_FORCED_LEVEL_AUTO) ? "auto" : | 126 | (level & AMD_DPM_FORCED_LEVEL_MANUAL) ? "manual" : |
126 | (level == AMD_DPM_FORCED_LEVEL_LOW) ? "low" : | 127 | "unknown")); |
127 | (level == AMD_DPM_FORCED_LEVEL_HIGH) ? "high" : | ||
128 | (level == AMD_DPM_FORCED_LEVEL_MANUAL) ? "manual" : "unknown"); | ||
129 | } else { | ||
130 | enum amdgpu_dpm_forced_level level; | ||
131 | |||
132 | level = adev->pm.dpm.forced_level; | ||
133 | return snprintf(buf, PAGE_SIZE, "%s\n", | ||
134 | (level == AMDGPU_DPM_FORCED_LEVEL_AUTO) ? "auto" : | ||
135 | (level == AMDGPU_DPM_FORCED_LEVEL_LOW) ? "low" : "high"); | ||
136 | } | ||
137 | } | 128 | } |
138 | 129 | ||
139 | static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, | 130 | static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, |
@@ -143,7 +134,7 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, | |||
143 | { | 134 | { |
144 | struct drm_device *ddev = dev_get_drvdata(dev); | 135 | struct drm_device *ddev = dev_get_drvdata(dev); |
145 | struct amdgpu_device *adev = ddev->dev_private; | 136 | struct amdgpu_device *adev = ddev->dev_private; |
146 | enum amdgpu_dpm_forced_level level; | 137 | enum amd_dpm_forced_level level; |
147 | int ret = 0; | 138 | int ret = 0; |
148 | 139 | ||
149 | /* Can't force performance level when the card is off */ | 140 | /* Can't force performance level when the card is off */ |
@@ -152,13 +143,13 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, | |||
152 | return -EINVAL; | 143 | return -EINVAL; |
153 | 144 | ||
154 | if (strncmp("low", buf, strlen("low")) == 0) { | 145 | if (strncmp("low", buf, strlen("low")) == 0) { |
155 | level = AMDGPU_DPM_FORCED_LEVEL_LOW; | 146 | level = AMD_DPM_FORCED_LEVEL_LOW; |
156 | } else if (strncmp("high", buf, strlen("high")) == 0) { | 147 | } else if (strncmp("high", buf, strlen("high")) == 0) { |
157 | level = AMDGPU_DPM_FORCED_LEVEL_HIGH; | 148 | level = AMD_DPM_FORCED_LEVEL_HIGH; |
158 | } else if (strncmp("auto", buf, strlen("auto")) == 0) { | 149 | } else if (strncmp("auto", buf, strlen("auto")) == 0) { |
159 | level = AMDGPU_DPM_FORCED_LEVEL_AUTO; | 150 | level = AMD_DPM_FORCED_LEVEL_AUTO; |
160 | } else if (strncmp("manual", buf, strlen("manual")) == 0) { | 151 | } else if (strncmp("manual", buf, strlen("manual")) == 0) { |
161 | level = AMDGPU_DPM_FORCED_LEVEL_MANUAL; | 152 | level = AMD_DPM_FORCED_LEVEL_MANUAL; |
162 | } else { | 153 | } else { |
163 | count = -EINVAL; | 154 | count = -EINVAL; |
164 | goto fail; | 155 | goto fail; |
@@ -1060,9 +1051,9 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev) | |||
1060 | 1051 | ||
1061 | if (adev->pm.funcs->force_performance_level) { | 1052 | if (adev->pm.funcs->force_performance_level) { |
1062 | if (adev->pm.dpm.thermal_active) { | 1053 | if (adev->pm.dpm.thermal_active) { |
1063 | enum amdgpu_dpm_forced_level level = adev->pm.dpm.forced_level; | 1054 | enum amd_dpm_forced_level level = adev->pm.dpm.forced_level; |
1064 | /* force low perf level for thermal */ | 1055 | /* force low perf level for thermal */ |
1065 | amdgpu_dpm_force_performance_level(adev, AMDGPU_DPM_FORCED_LEVEL_LOW); | 1056 | amdgpu_dpm_force_performance_level(adev, AMD_DPM_FORCED_LEVEL_LOW); |
1066 | /* save the user's level */ | 1057 | /* save the user's level */ |
1067 | adev->pm.dpm.forced_level = level; | 1058 | adev->pm.dpm.forced_level = level; |
1068 | } else { | 1059 | } else { |
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index bda9e3de191e..d8de7eb84f52 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c | |||
@@ -4336,13 +4336,13 @@ static u32 ci_get_lowest_enabled_level(struct amdgpu_device *adev, | |||
4336 | 4336 | ||
4337 | 4337 | ||
4338 | static int ci_dpm_force_performance_level(struct amdgpu_device *adev, | 4338 | static int ci_dpm_force_performance_level(struct amdgpu_device *adev, |
4339 | enum amdgpu_dpm_forced_level level) | 4339 | enum amd_dpm_forced_level level) |
4340 | { | 4340 | { |
4341 | struct ci_power_info *pi = ci_get_pi(adev); | 4341 | struct ci_power_info *pi = ci_get_pi(adev); |
4342 | u32 tmp, levels, i; | 4342 | u32 tmp, levels, i; |
4343 | int ret; | 4343 | int ret; |
4344 | 4344 | ||
4345 | if (level == AMDGPU_DPM_FORCED_LEVEL_HIGH) { | 4345 | if (level == AMD_DPM_FORCED_LEVEL_HIGH) { |
4346 | if ((!pi->pcie_dpm_key_disabled) && | 4346 | if ((!pi->pcie_dpm_key_disabled) && |
4347 | pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { | 4347 | pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { |
4348 | levels = 0; | 4348 | levels = 0; |
@@ -4403,7 +4403,7 @@ static int ci_dpm_force_performance_level(struct amdgpu_device *adev, | |||
4403 | } | 4403 | } |
4404 | } | 4404 | } |
4405 | } | 4405 | } |
4406 | } else if (level == AMDGPU_DPM_FORCED_LEVEL_LOW) { | 4406 | } else if (level == AMD_DPM_FORCED_LEVEL_LOW) { |
4407 | if ((!pi->sclk_dpm_key_disabled) && | 4407 | if ((!pi->sclk_dpm_key_disabled) && |
4408 | pi->dpm_level_enable_mask.sclk_dpm_enable_mask) { | 4408 | pi->dpm_level_enable_mask.sclk_dpm_enable_mask) { |
4409 | levels = ci_get_lowest_enabled_level(adev, | 4409 | levels = ci_get_lowest_enabled_level(adev, |
@@ -4452,7 +4452,7 @@ static int ci_dpm_force_performance_level(struct amdgpu_device *adev, | |||
4452 | udelay(1); | 4452 | udelay(1); |
4453 | } | 4453 | } |
4454 | } | 4454 | } |
4455 | } else if (level == AMDGPU_DPM_FORCED_LEVEL_AUTO) { | 4455 | } else if (level == AMD_DPM_FORCED_LEVEL_AUTO) { |
4456 | if (!pi->pcie_dpm_key_disabled) { | 4456 | if (!pi->pcie_dpm_key_disabled) { |
4457 | PPSMC_Result smc_result; | 4457 | PPSMC_Result smc_result; |
4458 | 4458 | ||
@@ -6262,7 +6262,7 @@ static int ci_dpm_sw_init(void *handle) | |||
6262 | /* default to balanced state */ | 6262 | /* default to balanced state */ |
6263 | adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; | 6263 | adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; |
6264 | adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; | 6264 | adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; |
6265 | adev->pm.dpm.forced_level = AMDGPU_DPM_FORCED_LEVEL_AUTO; | 6265 | adev->pm.dpm.forced_level = AMD_DPM_FORCED_LEVEL_AUTO; |
6266 | adev->pm.default_sclk = adev->clock.default_sclk; | 6266 | adev->pm.default_sclk = adev->clock.default_sclk; |
6267 | adev->pm.default_mclk = adev->clock.default_mclk; | 6267 | adev->pm.default_mclk = adev->clock.default_mclk; |
6268 | adev->pm.current_sclk = adev->clock.default_sclk; | 6268 | adev->pm.current_sclk = adev->clock.default_sclk; |
@@ -6572,7 +6572,7 @@ static int ci_dpm_force_clock_level(struct amdgpu_device *adev, | |||
6572 | struct ci_power_info *pi = ci_get_pi(adev); | 6572 | struct ci_power_info *pi = ci_get_pi(adev); |
6573 | 6573 | ||
6574 | if (adev->pm.dpm.forced_level | 6574 | if (adev->pm.dpm.forced_level |
6575 | != AMDGPU_DPM_FORCED_LEVEL_MANUAL) | 6575 | != AMD_DPM_FORCED_LEVEL_MANUAL) |
6576 | return -EINVAL; | 6576 | return -EINVAL; |
6577 | 6577 | ||
6578 | switch (type) { | 6578 | switch (type) { |
diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c index 5a1bc358bcb1..91f885ba2946 100644 --- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c | |||
@@ -1904,19 +1904,19 @@ static int kv_enable_nb_dpm(struct amdgpu_device *adev, | |||
1904 | } | 1904 | } |
1905 | 1905 | ||
1906 | static int kv_dpm_force_performance_level(struct amdgpu_device *adev, | 1906 | static int kv_dpm_force_performance_level(struct amdgpu_device *adev, |
1907 | enum amdgpu_dpm_forced_level level) | 1907 | enum amd_dpm_forced_level level) |
1908 | { | 1908 | { |
1909 | int ret; | 1909 | int ret; |
1910 | 1910 | ||
1911 | if (level == AMDGPU_DPM_FORCED_LEVEL_HIGH) { | 1911 | if (level == AMD_DPM_FORCED_LEVEL_HIGH) { |
1912 | ret = kv_force_dpm_highest(adev); | 1912 | ret = kv_force_dpm_highest(adev); |
1913 | if (ret) | 1913 | if (ret) |
1914 | return ret; | 1914 | return ret; |
1915 | } else if (level == AMDGPU_DPM_FORCED_LEVEL_LOW) { | 1915 | } else if (level == AMD_DPM_FORCED_LEVEL_LOW) { |
1916 | ret = kv_force_dpm_lowest(adev); | 1916 | ret = kv_force_dpm_lowest(adev); |
1917 | if (ret) | 1917 | if (ret) |
1918 | return ret; | 1918 | return ret; |
1919 | } else if (level == AMDGPU_DPM_FORCED_LEVEL_AUTO) { | 1919 | } else if (level == AMD_DPM_FORCED_LEVEL_AUTO) { |
1920 | ret = kv_unforce_levels(adev); | 1920 | ret = kv_unforce_levels(adev); |
1921 | if (ret) | 1921 | if (ret) |
1922 | return ret; | 1922 | return ret; |
@@ -3029,7 +3029,7 @@ static int kv_dpm_sw_init(void *handle) | |||
3029 | /* default to balanced state */ | 3029 | /* default to balanced state */ |
3030 | adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; | 3030 | adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; |
3031 | adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; | 3031 | adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; |
3032 | adev->pm.dpm.forced_level = AMDGPU_DPM_FORCED_LEVEL_AUTO; | 3032 | adev->pm.dpm.forced_level = AMD_DPM_FORCED_LEVEL_AUTO; |
3033 | adev->pm.default_sclk = adev->clock.default_sclk; | 3033 | adev->pm.default_sclk = adev->clock.default_sclk; |
3034 | adev->pm.default_mclk = adev->clock.default_mclk; | 3034 | adev->pm.default_mclk = adev->clock.default_mclk; |
3035 | adev->pm.current_sclk = adev->clock.default_sclk; | 3035 | adev->pm.current_sclk = adev->clock.default_sclk; |
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c index 6e150db8f380..738ebc125569 100644 --- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c | |||
@@ -3906,25 +3906,25 @@ static int si_restrict_performance_levels_before_switch(struct amdgpu_device *ad | |||
3906 | } | 3906 | } |
3907 | 3907 | ||
3908 | static int si_dpm_force_performance_level(struct amdgpu_device *adev, | 3908 | static int si_dpm_force_performance_level(struct amdgpu_device *adev, |
3909 | enum amdgpu_dpm_forced_level level) | 3909 | enum amd_dpm_forced_level level) |
3910 | { | 3910 | { |
3911 | struct amdgpu_ps *rps = adev->pm.dpm.current_ps; | 3911 | struct amdgpu_ps *rps = adev->pm.dpm.current_ps; |
3912 | struct si_ps *ps = si_get_ps(rps); | 3912 | struct si_ps *ps = si_get_ps(rps); |
3913 | u32 levels = ps->performance_level_count; | 3913 | u32 levels = ps->performance_level_count; |
3914 | 3914 | ||
3915 | if (level == AMDGPU_DPM_FORCED_LEVEL_HIGH) { | 3915 | if (level == AMD_DPM_FORCED_LEVEL_HIGH) { |
3916 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK) | 3916 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK) |
3917 | return -EINVAL; | 3917 | return -EINVAL; |
3918 | 3918 | ||
3919 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 1) != PPSMC_Result_OK) | 3919 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 1) != PPSMC_Result_OK) |
3920 | return -EINVAL; | 3920 | return -EINVAL; |
3921 | } else if (level == AMDGPU_DPM_FORCED_LEVEL_LOW) { | 3921 | } else if (level == AMD_DPM_FORCED_LEVEL_LOW) { |
3922 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) | 3922 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) |
3923 | return -EINVAL; | 3923 | return -EINVAL; |
3924 | 3924 | ||
3925 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetEnabledLevels, 1) != PPSMC_Result_OK) | 3925 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetEnabledLevels, 1) != PPSMC_Result_OK) |
3926 | return -EINVAL; | 3926 | return -EINVAL; |
3927 | } else if (level == AMDGPU_DPM_FORCED_LEVEL_AUTO) { | 3927 | } else if (level == AMD_DPM_FORCED_LEVEL_AUTO) { |
3928 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) | 3928 | if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) |
3929 | return -EINVAL; | 3929 | return -EINVAL; |
3930 | 3930 | ||
@@ -7746,7 +7746,7 @@ static int si_dpm_sw_init(void *handle) | |||
7746 | /* default to balanced state */ | 7746 | /* default to balanced state */ |
7747 | adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; | 7747 | adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; |
7748 | adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; | 7748 | adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; |
7749 | adev->pm.dpm.forced_level = AMDGPU_DPM_FORCED_LEVEL_AUTO; | 7749 | adev->pm.dpm.forced_level = AMD_DPM_FORCED_LEVEL_AUTO; |
7750 | adev->pm.default_sclk = adev->clock.default_sclk; | 7750 | adev->pm.default_sclk = adev->clock.default_sclk; |
7751 | adev->pm.default_mclk = adev->clock.default_mclk; | 7751 | adev->pm.default_mclk = adev->clock.default_mclk; |
7752 | adev->pm.current_sclk = adev->clock.default_sclk; | 7752 | adev->pm.current_sclk = adev->clock.default_sclk; |