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authorEvan Quan <evan.quan@amd.com>2018-08-14 14:53:52 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-08-27 12:10:49 -0400
commitd4e838431d56ac132a7f387b34e5c9f227dce428 (patch)
treedea852f8d23f4f1c99440edc62ce4e24ea7937bf /drivers/gpu/drm/amd/amdgpu
parent851c2509aef6ee2374d8192130f33e1166c1c2a3 (diff)
drm/amdgpu: added support 2nd UVD instance
Added psp fw loading support for vega20 2nd UVD instance. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/psp_v11_0.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c7
4 files changed, 13 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index a1edc70da979..b358e7519987 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -193,6 +193,7 @@ enum AMDGPU_UCODE_ID {
193 AMDGPU_UCODE_ID_STORAGE, 193 AMDGPU_UCODE_ID_STORAGE,
194 AMDGPU_UCODE_ID_SMC, 194 AMDGPU_UCODE_ID_SMC,
195 AMDGPU_UCODE_ID_UVD, 195 AMDGPU_UCODE_ID_UVD,
196 AMDGPU_UCODE_ID_UVD1,
196 AMDGPU_UCODE_ID_VCE, 197 AMDGPU_UCODE_ID_VCE,
197 AMDGPU_UCODE_ID_VCN, 198 AMDGPU_UCODE_ID_VCN,
198 AMDGPU_UCODE_ID_MAXIMUM, 199 AMDGPU_UCODE_ID_MAXIMUM,
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
index 0cf48d26c676..882bd83a28c4 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
@@ -189,7 +189,8 @@ enum psp_gfx_fw_type
189 GFX_FW_TYPE_RLC_RESTORE_LIST_GPM_MEM = 20, 189 GFX_FW_TYPE_RLC_RESTORE_LIST_GPM_MEM = 20,
190 GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_MEM = 21, 190 GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_MEM = 21,
191 GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL = 22, 191 GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL = 22,
192 GFX_FW_TYPE_MAX = 23 192 GFX_FW_TYPE_UVD1 = 23,
193 GFX_FW_TYPE_MAX = 24
193}; 194};
194 195
195/* Command to load HW IP FW. */ 196/* Command to load HW IP FW. */
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 9c58a23adc5d..b70cfa3fe1b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -81,6 +81,9 @@ psp_v11_0_get_fw_type(struct amdgpu_firmware_info *ucode, enum psp_gfx_fw_type *
81 case AMDGPU_UCODE_ID_VCE: 81 case AMDGPU_UCODE_ID_VCE:
82 *type = GFX_FW_TYPE_VCE; 82 *type = GFX_FW_TYPE_VCE;
83 break; 83 break;
84 case AMDGPU_UCODE_ID_UVD1:
85 *type = GFX_FW_TYPE_UVD1;
86 break;
84 case AMDGPU_UCODE_ID_MAXIMUM: 87 case AMDGPU_UCODE_ID_MAXIMUM:
85 default: 88 default:
86 return -EINVAL; 89 return -EINVAL;
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index e33425513a89..79cb3787a282 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
@@ -441,6 +441,13 @@ static int uvd_v7_0_sw_init(void *handle)
441 adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].fw = adev->uvd.fw; 441 adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].fw = adev->uvd.fw;
442 adev->firmware.fw_size += 442 adev->firmware.fw_size +=
443 ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE); 443 ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
444
445 if (adev->uvd.num_uvd_inst == UVD7_MAX_HW_INSTANCES_VEGA20) {
446 adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].ucode_id = AMDGPU_UCODE_ID_UVD1;
447 adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].fw = adev->uvd.fw;
448 adev->firmware.fw_size +=
449 ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
450 }
444 DRM_INFO("PSP loading UVD firmware\n"); 451 DRM_INFO("PSP loading UVD firmware\n");
445 } 452 }
446 453