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authorMario Kleiner <mario.kleiner.de@gmail.com>2017-04-23 19:02:46 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-05-25 09:44:35 -0400
commitd1f006efde1fa224a52a93a0d21eb389bdea851d (patch)
tree9efa5fa029427af733c13f44c4fd87702655a5b0 /drivers/gpu/drm/amd/amdgpu
parentb334b3492888068a4ae8373f4e813cf7364d4a61 (diff)
drm/amdgpu: Add missing lb_vblank_lead_lines setup to DCE-6 path.
commit effaf848b957fbf72a3b6a1ad87f5e031eda0b75 upstream. This apparently got lost when implementing the new DCE-6 support and would cause failures in pageflip scheduling and timestamping. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v6_0.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 4056318c558d..6d02bdb25d98 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -1050,7 +1050,7 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev,
1050 u32 priority_a_mark = 0, priority_b_mark = 0; 1050 u32 priority_a_mark = 0, priority_b_mark = 0;
1051 u32 priority_a_cnt = PRIORITY_OFF; 1051 u32 priority_a_cnt = PRIORITY_OFF;
1052 u32 priority_b_cnt = PRIORITY_OFF; 1052 u32 priority_b_cnt = PRIORITY_OFF;
1053 u32 tmp, arb_control3; 1053 u32 tmp, arb_control3, lb_vblank_lead_lines = 0;
1054 fixed20_12 a, b, c; 1054 fixed20_12 a, b, c;
1055 1055
1056 if (amdgpu_crtc->base.enabled && num_heads && mode) { 1056 if (amdgpu_crtc->base.enabled && num_heads && mode) {
@@ -1162,6 +1162,8 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev,
1162 c.full = dfixed_div(c, a); 1162 c.full = dfixed_div(c, a);
1163 priority_b_mark = dfixed_trunc(c); 1163 priority_b_mark = dfixed_trunc(c);
1164 priority_b_cnt |= priority_b_mark & PRIORITY_MARK_MASK; 1164 priority_b_cnt |= priority_b_mark & PRIORITY_MARK_MASK;
1165
1166 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);
1165 } 1167 }
1166 1168
1167 /* select wm A */ 1169 /* select wm A */
@@ -1191,6 +1193,9 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev,
1191 /* save values for DPM */ 1193 /* save values for DPM */
1192 amdgpu_crtc->line_time = line_time; 1194 amdgpu_crtc->line_time = line_time;
1193 amdgpu_crtc->wm_high = latency_watermark_a; 1195 amdgpu_crtc->wm_high = latency_watermark_a;
1196
1197 /* Save number of lines the linebuffer leads before the scanout */
1198 amdgpu_crtc->lb_vblank_lead_lines = lb_vblank_lead_lines;
1194} 1199}
1195 1200
1196/* watermark setup */ 1201/* watermark setup */