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authorAlex Deucher <alexander.deucher@amd.com>2015-07-08 22:23:38 -0400
committerAlex Deucher <alexander.deucher@amd.com>2015-08-05 14:26:48 -0400
commita0e2f50bdb588d91a553f2f6bd56be7bedc94b1a (patch)
tree5986627b8422328cae05c8f6ac90ce823f2aa573 /drivers/gpu/drm/amd/amdgpu
parent4469942bbbe5ebf845e04971d8c74e9b6178f9fa (diff)
drm/amdgpu: fix rb setting for CZ
Always set num_rbs to 2 for CZ. The 1 RB parts are often harvest configs. The will get sorted out in mesa when we program PA_SC_RASTER_CONFIG[_1]. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 9e1d4ddbf475..f7538ddf3a9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1983,6 +1983,7 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
1983 adev->gfx.config.max_shader_engines = 1; 1983 adev->gfx.config.max_shader_engines = 1;
1984 adev->gfx.config.max_tile_pipes = 2; 1984 adev->gfx.config.max_tile_pipes = 2;
1985 adev->gfx.config.max_sh_per_se = 1; 1985 adev->gfx.config.max_sh_per_se = 1;
1986 adev->gfx.config.max_backends_per_se = 2;
1986 1987
1987 switch (adev->pdev->revision) { 1988 switch (adev->pdev->revision) {
1988 case 0xc4: 1989 case 0xc4:
@@ -1991,7 +1992,6 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
1991 case 0xcc: 1992 case 0xcc:
1992 /* B10 */ 1993 /* B10 */
1993 adev->gfx.config.max_cu_per_sh = 8; 1994 adev->gfx.config.max_cu_per_sh = 8;
1994 adev->gfx.config.max_backends_per_se = 2;
1995 break; 1995 break;
1996 case 0xc5: 1996 case 0xc5:
1997 case 0x81: 1997 case 0x81:
@@ -2000,14 +2000,12 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
2000 case 0xcd: 2000 case 0xcd:
2001 /* B8 */ 2001 /* B8 */
2002 adev->gfx.config.max_cu_per_sh = 6; 2002 adev->gfx.config.max_cu_per_sh = 6;
2003 adev->gfx.config.max_backends_per_se = 2;
2004 break; 2003 break;
2005 case 0xc6: 2004 case 0xc6:
2006 case 0xca: 2005 case 0xca:
2007 case 0xce: 2006 case 0xce:
2008 /* B6 */ 2007 /* B6 */
2009 adev->gfx.config.max_cu_per_sh = 6; 2008 adev->gfx.config.max_cu_per_sh = 6;
2010 adev->gfx.config.max_backends_per_se = 2;
2011 break; 2009 break;
2012 case 0xc7: 2010 case 0xc7:
2013 case 0x87: 2011 case 0x87:
@@ -2015,7 +2013,6 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
2015 default: 2013 default:
2016 /* B4 */ 2014 /* B4 */
2017 adev->gfx.config.max_cu_per_sh = 4; 2015 adev->gfx.config.max_cu_per_sh = 4;
2018 adev->gfx.config.max_backends_per_se = 1;
2019 break; 2016 break;
2020 } 2017 }
2021 2018