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authorTom St Denis <tom.stdenis@amd.com>2016-09-02 08:19:15 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-09-02 11:33:24 -0400
commit832c6ef765a6943edeb30db25f33c0a56560c532 (patch)
treea7ba685e3e6782054b72db53b040473357271f78 /drivers/gpu/drm/amd/amdgpu
parente7706b422c087da851448c420c90821622ee1721 (diff)
drm/amd/amdgpu: Merge get_wptr functions in gfx6
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c31
1 files changed, 11 insertions, 20 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index d090f26bde4e..a6b76170b9c5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -1660,11 +1660,18 @@ static u32 gfx_v6_0_ring_get_rptr(struct amdgpu_ring *ring)
1660 return ring->adev->wb.wb[ring->rptr_offs]; 1660 return ring->adev->wb.wb[ring->rptr_offs];
1661} 1661}
1662 1662
1663static u32 gfx_v6_0_ring_get_wptr_gfx(struct amdgpu_ring *ring) 1663static u32 gfx_v6_0_ring_get_wptr(struct amdgpu_ring *ring)
1664{ 1664{
1665 struct amdgpu_device *adev = ring->adev; 1665 struct amdgpu_device *adev = ring->adev;
1666 1666
1667 return RREG32(CP_RB0_WPTR); 1667 if (ring == &adev->gfx.gfx_ring[0])
1668 return RREG32(CP_RB0_WPTR);
1669 else if (ring == &adev->gfx.compute_ring[0])
1670 return RREG32(CP_RB1_WPTR);
1671 else if (ring == &adev->gfx.compute_ring[1])
1672 return RREG32(CP_RB2_WPTR);
1673 else
1674 BUG();
1668} 1675}
1669 1676
1670static void gfx_v6_0_ring_set_wptr_gfx(struct amdgpu_ring *ring) 1677static void gfx_v6_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)
@@ -1675,22 +1682,6 @@ static void gfx_v6_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)
1675 (void)RREG32(CP_RB0_WPTR); 1682 (void)RREG32(CP_RB0_WPTR);
1676} 1683}
1677 1684
1678static u32 gfx_v6_0_ring_get_wptr_compute(struct amdgpu_ring *ring)
1679{
1680 struct amdgpu_device *adev = ring->adev;
1681 u32 wptr;
1682
1683 if (ring == &adev->gfx.compute_ring[0]) {
1684 wptr = RREG32(CP_RB1_WPTR);
1685 } else if (ring == &adev->gfx.compute_ring[1]) {
1686 wptr = RREG32(CP_RB2_WPTR);
1687 } else {
1688 BUG();
1689 }
1690
1691 return wptr;
1692}
1693
1694static void gfx_v6_0_ring_set_wptr_compute(struct amdgpu_ring *ring) 1685static void gfx_v6_0_ring_set_wptr_compute(struct amdgpu_ring *ring)
1695{ 1686{
1696 struct amdgpu_device *adev = ring->adev; 1687 struct amdgpu_device *adev = ring->adev;
@@ -3125,7 +3116,7 @@ const struct amd_ip_funcs gfx_v6_0_ip_funcs = {
3125 3116
3126static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = { 3117static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
3127 .get_rptr = gfx_v6_0_ring_get_rptr, 3118 .get_rptr = gfx_v6_0_ring_get_rptr,
3128 .get_wptr = gfx_v6_0_ring_get_wptr_gfx, 3119 .get_wptr = gfx_v6_0_ring_get_wptr,
3129 .set_wptr = gfx_v6_0_ring_set_wptr_gfx, 3120 .set_wptr = gfx_v6_0_ring_set_wptr_gfx,
3130 .parse_cs = NULL, 3121 .parse_cs = NULL,
3131 .emit_ib = gfx_v6_0_ring_emit_ib_gfx, 3122 .emit_ib = gfx_v6_0_ring_emit_ib_gfx,
@@ -3142,7 +3133,7 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
3142 3133
3143static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = { 3134static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = {
3144 .get_rptr = gfx_v6_0_ring_get_rptr, 3135 .get_rptr = gfx_v6_0_ring_get_rptr,
3145 .get_wptr = gfx_v6_0_ring_get_wptr_compute, 3136 .get_wptr = gfx_v6_0_ring_get_wptr,
3146 .set_wptr = gfx_v6_0_ring_set_wptr_compute, 3137 .set_wptr = gfx_v6_0_ring_set_wptr_compute,
3147 .parse_cs = NULL, 3138 .parse_cs = NULL,
3148 .emit_ib = gfx_v6_0_ring_emit_ib_compute, 3139 .emit_ib = gfx_v6_0_ring_emit_ib_compute,