diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2016-09-30 11:19:41 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-10-25 14:38:04 -0400 |
commit | 82b9f817607060770a92900bd1e708028b7f2a2e (patch) | |
tree | 88c91c3a1d9171ecf655ffe2881c7ddc1a20dd07 /drivers/gpu/drm/amd/amdgpu | |
parent | 425f6d603371d1592830f27cc9779181a7146d6b (diff) |
drm/amdgpu/virtual_dce: drop pageflip_irq funcs
Never used.
Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 35 |
1 files changed, 6 insertions, 29 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c index f71a1f0dd487..23a842fd8376 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c | |||
@@ -209,10 +209,9 @@ static void dce_virtual_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
209 | switch (mode) { | 209 | switch (mode) { |
210 | case DRM_MODE_DPMS_ON: | 210 | case DRM_MODE_DPMS_ON: |
211 | amdgpu_crtc->enabled = true; | 211 | amdgpu_crtc->enabled = true; |
212 | /* Make sure VBLANK and PFLIP interrupts are still enabled */ | 212 | /* Make sure VBLANK interrupts are still enabled */ |
213 | type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); | 213 | type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); |
214 | amdgpu_irq_update(adev, &adev->crtc_irq, type); | 214 | amdgpu_irq_update(adev, &adev->crtc_irq, type); |
215 | amdgpu_irq_update(adev, &adev->pageflip_irq, type); | ||
216 | drm_vblank_on(dev, amdgpu_crtc->crtc_id); | 215 | drm_vblank_on(dev, amdgpu_crtc->crtc_id); |
217 | break; | 216 | break; |
218 | case DRM_MODE_DPMS_STANDBY: | 217 | case DRM_MODE_DPMS_STANDBY: |
@@ -668,8 +667,8 @@ static enum hrtimer_restart dce_virtual_vblank_timer_handle(struct hrtimer *vbla | |||
668 | } | 667 | } |
669 | 668 | ||
670 | static void dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, | 669 | static void dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, |
671 | int crtc, | 670 | int crtc, |
672 | enum amdgpu_interrupt_state state) | 671 | enum amdgpu_interrupt_state state) |
673 | { | 672 | { |
674 | if (crtc >= adev->mode_info.num_crtc) { | 673 | if (crtc >= adev->mode_info.num_crtc) { |
675 | DRM_DEBUG("invalid crtc %d\n", crtc); | 674 | DRM_DEBUG("invalid crtc %d\n", crtc); |
@@ -693,9 +692,9 @@ static void dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *ad | |||
693 | 692 | ||
694 | 693 | ||
695 | static int dce_virtual_set_crtc_irq_state(struct amdgpu_device *adev, | 694 | static int dce_virtual_set_crtc_irq_state(struct amdgpu_device *adev, |
696 | struct amdgpu_irq_src *source, | 695 | struct amdgpu_irq_src *source, |
697 | unsigned type, | 696 | unsigned type, |
698 | enum amdgpu_interrupt_state state) | 697 | enum amdgpu_interrupt_state state) |
699 | { | 698 | { |
700 | switch (type) { | 699 | switch (type) { |
701 | case AMDGPU_CRTC_IRQ_VBLANK1: | 700 | case AMDGPU_CRTC_IRQ_VBLANK1: |
@@ -722,20 +721,6 @@ static int dce_virtual_crtc_irq(struct amdgpu_device *adev, | |||
722 | return 0; | 721 | return 0; |
723 | } | 722 | } |
724 | 723 | ||
725 | static int dce_virtual_set_pageflip_irq_state(struct amdgpu_device *adev, | ||
726 | struct amdgpu_irq_src *src, | ||
727 | unsigned type, | ||
728 | enum amdgpu_interrupt_state state) | ||
729 | { | ||
730 | if (type >= adev->mode_info.num_crtc) { | ||
731 | DRM_ERROR("invalid pageflip crtc %d\n", type); | ||
732 | return -EINVAL; | ||
733 | } | ||
734 | DRM_DEBUG("[FM]set pageflip irq type %d state %d\n", type, state); | ||
735 | |||
736 | return 0; | ||
737 | } | ||
738 | |||
739 | static int dce_virtual_pageflip_irq(struct amdgpu_device *adev, | 724 | static int dce_virtual_pageflip_irq(struct amdgpu_device *adev, |
740 | struct amdgpu_irq_src *source, | 725 | struct amdgpu_irq_src *source, |
741 | struct amdgpu_iv_entry *entry) | 726 | struct amdgpu_iv_entry *entry) |
@@ -789,17 +774,9 @@ static const struct amdgpu_irq_src_funcs dce_virtual_crtc_irq_funcs = { | |||
789 | .process = dce_virtual_crtc_irq, | 774 | .process = dce_virtual_crtc_irq, |
790 | }; | 775 | }; |
791 | 776 | ||
792 | static const struct amdgpu_irq_src_funcs dce_virtual_pageflip_irq_funcs = { | ||
793 | .set = dce_virtual_set_pageflip_irq_state, | ||
794 | .process = dce_virtual_pageflip_irq, | ||
795 | }; | ||
796 | |||
797 | static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev) | 777 | static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev) |
798 | { | 778 | { |
799 | adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST; | 779 | adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST; |
800 | adev->crtc_irq.funcs = &dce_virtual_crtc_irq_funcs; | 780 | adev->crtc_irq.funcs = &dce_virtual_crtc_irq_funcs; |
801 | |||
802 | adev->pageflip_irq.num_types = AMDGPU_PAGEFLIP_IRQ_LAST; | ||
803 | adev->pageflip_irq.funcs = &dce_virtual_pageflip_irq_funcs; | ||
804 | } | 781 | } |
805 | 782 | ||