diff options
author | Alexandre Demers <alexandre.f.demers@gmail.com> | 2016-08-10 03:02:04 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-08-10 14:35:42 -0400 |
commit | 75cd45a497812d531cfad8b816485f84e9c082e9 (patch) | |
tree | 3475847fa3aa469857d07a250b8e721855344be2 /drivers/gpu/drm/amd/amdgpu | |
parent | f837297ad82480024d3ad08cd84f6670bcafa862 (diff) |
Fixing copy-paste errors and removing unneeded newlines
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c index 9fcf74032885..efca1b972813 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | |||
@@ -1659,7 +1659,7 @@ static void dce_v8_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock | |||
1659 | struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv; | 1659 | struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv; |
1660 | uint32_t offset = dig->afmt->offset; | 1660 | uint32_t offset = dig->afmt->offset; |
1661 | 1661 | ||
1662 | WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT)); | 1662 | WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT)); |
1663 | WREG32(mmHDMI_ACR_32_1 + offset, acr.n_32khz); | 1663 | WREG32(mmHDMI_ACR_32_1 + offset, acr.n_32khz); |
1664 | 1664 | ||
1665 | WREG32(mmHDMI_ACR_44_0 + offset, (acr.cts_44_1khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT)); | 1665 | WREG32(mmHDMI_ACR_44_0 + offset, (acr.cts_44_1khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT)); |
@@ -2045,7 +2045,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc, | |||
2045 | case DRM_FORMAT_XRGB4444: | 2045 | case DRM_FORMAT_XRGB4444: |
2046 | case DRM_FORMAT_ARGB4444: | 2046 | case DRM_FORMAT_ARGB4444: |
2047 | fb_format = ((GRPH_DEPTH_16BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | | 2047 | fb_format = ((GRPH_DEPTH_16BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | |
2048 | (GRPH_FORMAT_ARGB1555 << GRPH_CONTROL__GRPH_FORMAT__SHIFT)); | 2048 | (GRPH_FORMAT_ARGB4444 << GRPH_CONTROL__GRPH_FORMAT__SHIFT)); |
2049 | #ifdef __BIG_ENDIAN | 2049 | #ifdef __BIG_ENDIAN |
2050 | fb_swap = (GRPH_ENDIAN_8IN16 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); | 2050 | fb_swap = (GRPH_ENDIAN_8IN16 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); |
2051 | #endif | 2051 | #endif |
@@ -2699,7 +2699,7 @@ static void dce_v8_0_crtc_disable(struct drm_crtc *crtc) | |||
2699 | case ATOM_PPLL2: | 2699 | case ATOM_PPLL2: |
2700 | /* disable the ppll */ | 2700 | /* disable the ppll */ |
2701 | amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, | 2701 | amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, |
2702 | 0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss); | 2702 | 0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss); |
2703 | break; | 2703 | break; |
2704 | case ATOM_PPLL0: | 2704 | case ATOM_PPLL0: |
2705 | /* disable the ppll */ | 2705 | /* disable the ppll */ |
@@ -3281,7 +3281,6 @@ static int dce_v8_0_crtc_irq(struct amdgpu_device *adev, | |||
3281 | drm_handle_vblank(adev->ddev, crtc); | 3281 | drm_handle_vblank(adev->ddev, crtc); |
3282 | } | 3282 | } |
3283 | DRM_DEBUG("IH: D%d vblank\n", crtc + 1); | 3283 | DRM_DEBUG("IH: D%d vblank\n", crtc + 1); |
3284 | |||
3285 | break; | 3284 | break; |
3286 | case 1: /* vline */ | 3285 | case 1: /* vline */ |
3287 | if (disp_int & interrupt_status_offsets[crtc].vline) | 3286 | if (disp_int & interrupt_status_offsets[crtc].vline) |
@@ -3290,7 +3289,6 @@ static int dce_v8_0_crtc_irq(struct amdgpu_device *adev, | |||
3290 | DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); | 3289 | DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); |
3291 | 3290 | ||
3292 | DRM_DEBUG("IH: D%d vline\n", crtc + 1); | 3291 | DRM_DEBUG("IH: D%d vline\n", crtc + 1); |
3293 | |||
3294 | break; | 3292 | break; |
3295 | default: | 3293 | default: |
3296 | DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data); | 3294 | DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data); |