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authorTom St Denis <tom.stdenis@amd.com>2016-09-02 08:13:48 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-09-02 11:32:55 -0400
commit6f924e202675651369b85ee8bea591768bf7a55d (patch)
tree9613af6d1c8d2eeb505e0fda77da00599a44e852 /drivers/gpu/drm/amd/amdgpu
parent4aeacf0f9aa8a6ade9ce85f0074ba848230eb34f (diff)
drm/amd/amdgpu: Merge get_rptr functions in gfx6
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index f430d6acc002..d090f26bde4e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -1655,7 +1655,7 @@ static int gfx_v6_0_cp_gfx_resume(struct amdgpu_device *adev)
1655 return 0; 1655 return 0;
1656} 1656}
1657 1657
1658static u32 gfx_v6_0_ring_get_rptr_gfx(struct amdgpu_ring *ring) 1658static u32 gfx_v6_0_ring_get_rptr(struct amdgpu_ring *ring)
1659{ 1659{
1660 return ring->adev->wb.wb[ring->rptr_offs]; 1660 return ring->adev->wb.wb[ring->rptr_offs];
1661} 1661}
@@ -1675,11 +1675,6 @@ static void gfx_v6_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)
1675 (void)RREG32(CP_RB0_WPTR); 1675 (void)RREG32(CP_RB0_WPTR);
1676} 1676}
1677 1677
1678static u32 gfx_v6_0_ring_get_rptr_compute(struct amdgpu_ring *ring)
1679{
1680 return ring->adev->wb.wb[ring->rptr_offs];
1681}
1682
1683static u32 gfx_v6_0_ring_get_wptr_compute(struct amdgpu_ring *ring) 1678static u32 gfx_v6_0_ring_get_wptr_compute(struct amdgpu_ring *ring)
1684{ 1679{
1685 struct amdgpu_device *adev = ring->adev; 1680 struct amdgpu_device *adev = ring->adev;
@@ -3129,7 +3124,7 @@ const struct amd_ip_funcs gfx_v6_0_ip_funcs = {
3129}; 3124};
3130 3125
3131static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = { 3126static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
3132 .get_rptr = gfx_v6_0_ring_get_rptr_gfx, 3127 .get_rptr = gfx_v6_0_ring_get_rptr,
3133 .get_wptr = gfx_v6_0_ring_get_wptr_gfx, 3128 .get_wptr = gfx_v6_0_ring_get_wptr_gfx,
3134 .set_wptr = gfx_v6_0_ring_set_wptr_gfx, 3129 .set_wptr = gfx_v6_0_ring_set_wptr_gfx,
3135 .parse_cs = NULL, 3130 .parse_cs = NULL,
@@ -3146,7 +3141,7 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
3146}; 3141};
3147 3142
3148static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = { 3143static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = {
3149 .get_rptr = gfx_v6_0_ring_get_rptr_compute, 3144 .get_rptr = gfx_v6_0_ring_get_rptr,
3150 .get_wptr = gfx_v6_0_ring_get_wptr_compute, 3145 .get_wptr = gfx_v6_0_ring_get_wptr_compute,
3151 .set_wptr = gfx_v6_0_ring_set_wptr_compute, 3146 .set_wptr = gfx_v6_0_ring_set_wptr_compute,
3152 .parse_cs = NULL, 3147 .parse_cs = NULL,