drm/amdgpu: cache the fence to wait for a VMID

Beneficial when a lot of processes are waiting for VMIDs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

3 files changed, 9 insertions, 2 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
index 156e026046b5..7d2805729c20 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
@@ -205,6 +205,9 @@ static int amdgpu_vmid_grab_idle(struct amdgpu_vm *vm,
         unsigned i;
         int r;
 
+        if (ring->vmid_wait && !dma_fence_is_signaled(ring->vmid_wait))
+                return amdgpu_sync_fence(adev, sync, ring->vmid_wait, false);
+
         fences = kmalloc_array(sizeof(void *), id_mgr->num_ids, GFP_KERNEL);
         if (!fences)
                 return -ENOMEM;
@@ -239,9 +242,9 @@ static int amdgpu_vmid_grab_idle(struct amdgpu_vm *vm,
                 }
 
                 r = amdgpu_sync_fence(adev, sync, &array->base, false);
-                dma_fence_put(&array->base);
+                dma_fence_put(ring->vmid_wait);
+                ring->vmid_wait = &array->base;
                 return r;
-
         }
         kfree(fences);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 13044e66dcaf..e223b0f6417b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -360,6 +360,9 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring)
 
         amdgpu_debugfs_ring_fini(ring);
 
+        dma_fence_put(ring->vmid_wait);
+        ring->vmid_wait = NULL;
+
         ring->adev->rings[ring->idx] = NULL;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 867f53332305..075976855651 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -196,6 +196,7 @@ struct amdgpu_ring {
         u64                     cond_exe_gpu_addr;
         volatile u32            *cond_exe_cpu_addr;
         unsigned                vm_inv_eng;
+        struct dma_fence        *vmid_wait;
         bool                    has_compute_vm_bug;
 
         atomic_t                num_jobs[DRM_SCHED_PRIORITY_MAX];