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authorDave Airlie <airlied@redhat.com>2016-04-11 23:25:48 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-05-04 20:20:28 -0400
commit110e6f26af80dfd90b6e5c645b1aed7228aa580d (patch)
treea7e5d99bc6b2fc49461902fac77bdbd5496da5c1 /drivers/gpu/drm/amd/amdgpu
parentc036554170fcc2238c32a7edd72c1b61b886428a (diff)
drm/amd: make a type-safe cgs_device struct. (v2)
This is just a type-safety things to avoid everyone taking void *, it doesn't change anything. v2: agd5f: split out the dal changes into a separate patch. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h11
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c92
3 files changed, 49 insertions, 56 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index c9fe2d56cebf..a7a53ac5f413 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1868,15 +1868,8 @@ struct amdgpu_atcs {
1868/* 1868/*
1869 * CGS 1869 * CGS
1870 */ 1870 */
1871void *amdgpu_cgs_create_device(struct amdgpu_device *adev); 1871struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
1872void amdgpu_cgs_destroy_device(void *cgs_device); 1872void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
1873
1874
1875/*
1876 * CGS
1877 */
1878void *amdgpu_cgs_create_device(struct amdgpu_device *adev);
1879void amdgpu_cgs_destroy_device(void *cgs_device);
1880 1873
1881 1874
1882/* GPU virtualization */ 1875/* GPU virtualization */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h
index f6e32a639107..8a396313c86f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h
@@ -30,7 +30,7 @@
30 30
31struct amdgpu_acp { 31struct amdgpu_acp {
32 struct device *parent; 32 struct device *parent;
33 void *cgs_device; 33 struct cgs_device *cgs_device;
34 struct amd_acp_private *private; 34 struct amd_acp_private *private;
35 struct mfd_cell *acp_cell; 35 struct mfd_cell *acp_cell;
36 struct resource *acp_res; 36 struct resource *acp_res;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 6043dc7c3a94..8b653f2c7086 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -42,7 +42,7 @@ struct amdgpu_cgs_device {
42 struct amdgpu_device *adev = \ 42 struct amdgpu_device *adev = \
43 ((struct amdgpu_cgs_device *)cgs_device)->adev 43 ((struct amdgpu_cgs_device *)cgs_device)->adev
44 44
45static int amdgpu_cgs_gpu_mem_info(void *cgs_device, enum cgs_gpu_mem_type type, 45static int amdgpu_cgs_gpu_mem_info(struct cgs_device *cgs_device, enum cgs_gpu_mem_type type,
46 uint64_t *mc_start, uint64_t *mc_size, 46 uint64_t *mc_start, uint64_t *mc_size,
47 uint64_t *mem_size) 47 uint64_t *mem_size)
48{ 48{
@@ -73,7 +73,7 @@ static int amdgpu_cgs_gpu_mem_info(void *cgs_device, enum cgs_gpu_mem_type type,
73 return 0; 73 return 0;
74} 74}
75 75
76static int amdgpu_cgs_gmap_kmem(void *cgs_device, void *kmem, 76static int amdgpu_cgs_gmap_kmem(struct cgs_device *cgs_device, void *kmem,
77 uint64_t size, 77 uint64_t size,
78 uint64_t min_offset, uint64_t max_offset, 78 uint64_t min_offset, uint64_t max_offset,
79 cgs_handle_t *kmem_handle, uint64_t *mcaddr) 79 cgs_handle_t *kmem_handle, uint64_t *mcaddr)
@@ -102,7 +102,7 @@ static int amdgpu_cgs_gmap_kmem(void *cgs_device, void *kmem,
102 return ret; 102 return ret;
103} 103}
104 104
105static int amdgpu_cgs_gunmap_kmem(void *cgs_device, cgs_handle_t kmem_handle) 105static int amdgpu_cgs_gunmap_kmem(struct cgs_device *cgs_device, cgs_handle_t kmem_handle)
106{ 106{
107 struct amdgpu_bo *obj = (struct amdgpu_bo *)kmem_handle; 107 struct amdgpu_bo *obj = (struct amdgpu_bo *)kmem_handle;
108 108
@@ -118,7 +118,7 @@ static int amdgpu_cgs_gunmap_kmem(void *cgs_device, cgs_handle_t kmem_handle)
118 return 0; 118 return 0;
119} 119}
120 120
121static int amdgpu_cgs_alloc_gpu_mem(void *cgs_device, 121static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,
122 enum cgs_gpu_mem_type type, 122 enum cgs_gpu_mem_type type,
123 uint64_t size, uint64_t align, 123 uint64_t size, uint64_t align,
124 uint64_t min_offset, uint64_t max_offset, 124 uint64_t min_offset, uint64_t max_offset,
@@ -208,7 +208,7 @@ static int amdgpu_cgs_alloc_gpu_mem(void *cgs_device,
208 return ret; 208 return ret;
209} 209}
210 210
211static int amdgpu_cgs_free_gpu_mem(void *cgs_device, cgs_handle_t handle) 211static int amdgpu_cgs_free_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
212{ 212{
213 struct amdgpu_bo *obj = (struct amdgpu_bo *)handle; 213 struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
214 214
@@ -225,7 +225,7 @@ static int amdgpu_cgs_free_gpu_mem(void *cgs_device, cgs_handle_t handle)
225 return 0; 225 return 0;
226} 226}
227 227
228static int amdgpu_cgs_gmap_gpu_mem(void *cgs_device, cgs_handle_t handle, 228static int amdgpu_cgs_gmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle,
229 uint64_t *mcaddr) 229 uint64_t *mcaddr)
230{ 230{
231 int r; 231 int r;
@@ -246,7 +246,7 @@ static int amdgpu_cgs_gmap_gpu_mem(void *cgs_device, cgs_handle_t handle,
246 return r; 246 return r;
247} 247}
248 248
249static int amdgpu_cgs_gunmap_gpu_mem(void *cgs_device, cgs_handle_t handle) 249static int amdgpu_cgs_gunmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
250{ 250{
251 int r; 251 int r;
252 struct amdgpu_bo *obj = (struct amdgpu_bo *)handle; 252 struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
@@ -258,7 +258,7 @@ static int amdgpu_cgs_gunmap_gpu_mem(void *cgs_device, cgs_handle_t handle)
258 return r; 258 return r;
259} 259}
260 260
261static int amdgpu_cgs_kmap_gpu_mem(void *cgs_device, cgs_handle_t handle, 261static int amdgpu_cgs_kmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle,
262 void **map) 262 void **map)
263{ 263{
264 int r; 264 int r;
@@ -271,7 +271,7 @@ static int amdgpu_cgs_kmap_gpu_mem(void *cgs_device, cgs_handle_t handle,
271 return r; 271 return r;
272} 272}
273 273
274static int amdgpu_cgs_kunmap_gpu_mem(void *cgs_device, cgs_handle_t handle) 274static int amdgpu_cgs_kunmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
275{ 275{
276 int r; 276 int r;
277 struct amdgpu_bo *obj = (struct amdgpu_bo *)handle; 277 struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
@@ -283,20 +283,20 @@ static int amdgpu_cgs_kunmap_gpu_mem(void *cgs_device, cgs_handle_t handle)
283 return r; 283 return r;
284} 284}
285 285
286static uint32_t amdgpu_cgs_read_register(void *cgs_device, unsigned offset) 286static uint32_t amdgpu_cgs_read_register(struct cgs_device *cgs_device, unsigned offset)
287{ 287{
288 CGS_FUNC_ADEV; 288 CGS_FUNC_ADEV;
289 return RREG32(offset); 289 return RREG32(offset);
290} 290}
291 291
292static void amdgpu_cgs_write_register(void *cgs_device, unsigned offset, 292static void amdgpu_cgs_write_register(struct cgs_device *cgs_device, unsigned offset,
293 uint32_t value) 293 uint32_t value)
294{ 294{
295 CGS_FUNC_ADEV; 295 CGS_FUNC_ADEV;
296 WREG32(offset, value); 296 WREG32(offset, value);
297} 297}
298 298
299static uint32_t amdgpu_cgs_read_ind_register(void *cgs_device, 299static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device,
300 enum cgs_ind_reg space, 300 enum cgs_ind_reg space,
301 unsigned index) 301 unsigned index)
302{ 302{
@@ -320,7 +320,7 @@ static uint32_t amdgpu_cgs_read_ind_register(void *cgs_device,
320 return 0; 320 return 0;
321} 321}
322 322
323static void amdgpu_cgs_write_ind_register(void *cgs_device, 323static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device,
324 enum cgs_ind_reg space, 324 enum cgs_ind_reg space,
325 unsigned index, uint32_t value) 325 unsigned index, uint32_t value)
326{ 326{
@@ -343,7 +343,7 @@ static void amdgpu_cgs_write_ind_register(void *cgs_device,
343 WARN(1, "Invalid indirect register space"); 343 WARN(1, "Invalid indirect register space");
344} 344}
345 345
346static uint8_t amdgpu_cgs_read_pci_config_byte(void *cgs_device, unsigned addr) 346static uint8_t amdgpu_cgs_read_pci_config_byte(struct cgs_device *cgs_device, unsigned addr)
347{ 347{
348 CGS_FUNC_ADEV; 348 CGS_FUNC_ADEV;
349 uint8_t val; 349 uint8_t val;
@@ -353,7 +353,7 @@ static uint8_t amdgpu_cgs_read_pci_config_byte(void *cgs_device, unsigned addr)
353 return val; 353 return val;
354} 354}
355 355
356static uint16_t amdgpu_cgs_read_pci_config_word(void *cgs_device, unsigned addr) 356static uint16_t amdgpu_cgs_read_pci_config_word(struct cgs_device *cgs_device, unsigned addr)
357{ 357{
358 CGS_FUNC_ADEV; 358 CGS_FUNC_ADEV;
359 uint16_t val; 359 uint16_t val;
@@ -363,7 +363,7 @@ static uint16_t amdgpu_cgs_read_pci_config_word(void *cgs_device, unsigned addr)
363 return val; 363 return val;
364} 364}
365 365
366static uint32_t amdgpu_cgs_read_pci_config_dword(void *cgs_device, 366static uint32_t amdgpu_cgs_read_pci_config_dword(struct cgs_device *cgs_device,
367 unsigned addr) 367 unsigned addr)
368{ 368{
369 CGS_FUNC_ADEV; 369 CGS_FUNC_ADEV;
@@ -374,7 +374,7 @@ static uint32_t amdgpu_cgs_read_pci_config_dword(void *cgs_device,
374 return val; 374 return val;
375} 375}
376 376
377static void amdgpu_cgs_write_pci_config_byte(void *cgs_device, unsigned addr, 377static void amdgpu_cgs_write_pci_config_byte(struct cgs_device *cgs_device, unsigned addr,
378 uint8_t value) 378 uint8_t value)
379{ 379{
380 CGS_FUNC_ADEV; 380 CGS_FUNC_ADEV;
@@ -382,7 +382,7 @@ static void amdgpu_cgs_write_pci_config_byte(void *cgs_device, unsigned addr,
382 WARN(ret, "pci_write_config_byte error"); 382 WARN(ret, "pci_write_config_byte error");
383} 383}
384 384
385static void amdgpu_cgs_write_pci_config_word(void *cgs_device, unsigned addr, 385static void amdgpu_cgs_write_pci_config_word(struct cgs_device *cgs_device, unsigned addr,
386 uint16_t value) 386 uint16_t value)
387{ 387{
388 CGS_FUNC_ADEV; 388 CGS_FUNC_ADEV;
@@ -390,7 +390,7 @@ static void amdgpu_cgs_write_pci_config_word(void *cgs_device, unsigned addr,
390 WARN(ret, "pci_write_config_word error"); 390 WARN(ret, "pci_write_config_word error");
391} 391}
392 392
393static void amdgpu_cgs_write_pci_config_dword(void *cgs_device, unsigned addr, 393static void amdgpu_cgs_write_pci_config_dword(struct cgs_device *cgs_device, unsigned addr,
394 uint32_t value) 394 uint32_t value)
395{ 395{
396 CGS_FUNC_ADEV; 396 CGS_FUNC_ADEV;
@@ -399,7 +399,7 @@ static void amdgpu_cgs_write_pci_config_dword(void *cgs_device, unsigned addr,
399} 399}
400 400
401 401
402static int amdgpu_cgs_get_pci_resource(void *cgs_device, 402static int amdgpu_cgs_get_pci_resource(struct cgs_device *cgs_device,
403 enum cgs_resource_type resource_type, 403 enum cgs_resource_type resource_type,
404 uint64_t size, 404 uint64_t size,
405 uint64_t offset, 405 uint64_t offset,
@@ -433,7 +433,7 @@ static int amdgpu_cgs_get_pci_resource(void *cgs_device,
433 } 433 }
434} 434}
435 435
436static const void *amdgpu_cgs_atom_get_data_table(void *cgs_device, 436static const void *amdgpu_cgs_atom_get_data_table(struct cgs_device *cgs_device,
437 unsigned table, uint16_t *size, 437 unsigned table, uint16_t *size,
438 uint8_t *frev, uint8_t *crev) 438 uint8_t *frev, uint8_t *crev)
439{ 439{
@@ -449,7 +449,7 @@ static const void *amdgpu_cgs_atom_get_data_table(void *cgs_device,
449 return NULL; 449 return NULL;
450} 450}
451 451
452static int amdgpu_cgs_atom_get_cmd_table_revs(void *cgs_device, unsigned table, 452static int amdgpu_cgs_atom_get_cmd_table_revs(struct cgs_device *cgs_device, unsigned table,
453 uint8_t *frev, uint8_t *crev) 453 uint8_t *frev, uint8_t *crev)
454{ 454{
455 CGS_FUNC_ADEV; 455 CGS_FUNC_ADEV;
@@ -462,7 +462,7 @@ static int amdgpu_cgs_atom_get_cmd_table_revs(void *cgs_device, unsigned table,
462 return -EINVAL; 462 return -EINVAL;
463} 463}
464 464
465static int amdgpu_cgs_atom_exec_cmd_table(void *cgs_device, unsigned table, 465static int amdgpu_cgs_atom_exec_cmd_table(struct cgs_device *cgs_device, unsigned table,
466 void *args) 466 void *args)
467{ 467{
468 CGS_FUNC_ADEV; 468 CGS_FUNC_ADEV;
@@ -471,33 +471,33 @@ static int amdgpu_cgs_atom_exec_cmd_table(void *cgs_device, unsigned table,
471 adev->mode_info.atom_context, table, args); 471 adev->mode_info.atom_context, table, args);
472} 472}
473 473
474static int amdgpu_cgs_create_pm_request(void *cgs_device, cgs_handle_t *request) 474static int amdgpu_cgs_create_pm_request(struct cgs_device *cgs_device, cgs_handle_t *request)
475{ 475{
476 /* TODO */ 476 /* TODO */
477 return 0; 477 return 0;
478} 478}
479 479
480static int amdgpu_cgs_destroy_pm_request(void *cgs_device, cgs_handle_t request) 480static int amdgpu_cgs_destroy_pm_request(struct cgs_device *cgs_device, cgs_handle_t request)
481{ 481{
482 /* TODO */ 482 /* TODO */
483 return 0; 483 return 0;
484} 484}
485 485
486static int amdgpu_cgs_set_pm_request(void *cgs_device, cgs_handle_t request, 486static int amdgpu_cgs_set_pm_request(struct cgs_device *cgs_device, cgs_handle_t request,
487 int active) 487 int active)
488{ 488{
489 /* TODO */ 489 /* TODO */
490 return 0; 490 return 0;
491} 491}
492 492
493static int amdgpu_cgs_pm_request_clock(void *cgs_device, cgs_handle_t request, 493static int amdgpu_cgs_pm_request_clock(struct cgs_device *cgs_device, cgs_handle_t request,
494 enum cgs_clock clock, unsigned freq) 494 enum cgs_clock clock, unsigned freq)
495{ 495{
496 /* TODO */ 496 /* TODO */
497 return 0; 497 return 0;
498} 498}
499 499
500static int amdgpu_cgs_pm_request_engine(void *cgs_device, cgs_handle_t request, 500static int amdgpu_cgs_pm_request_engine(struct cgs_device *cgs_device, cgs_handle_t request,
501 enum cgs_engine engine, int powered) 501 enum cgs_engine engine, int powered)
502{ 502{
503 /* TODO */ 503 /* TODO */
@@ -506,7 +506,7 @@ static int amdgpu_cgs_pm_request_engine(void *cgs_device, cgs_handle_t request,
506 506
507 507
508 508
509static int amdgpu_cgs_pm_query_clock_limits(void *cgs_device, 509static int amdgpu_cgs_pm_query_clock_limits(struct cgs_device *cgs_device,
510 enum cgs_clock clock, 510 enum cgs_clock clock,
511 struct cgs_clock_limits *limits) 511 struct cgs_clock_limits *limits)
512{ 512{
@@ -514,7 +514,7 @@ static int amdgpu_cgs_pm_query_clock_limits(void *cgs_device,
514 return 0; 514 return 0;
515} 515}
516 516
517static int amdgpu_cgs_set_camera_voltages(void *cgs_device, uint32_t mask, 517static int amdgpu_cgs_set_camera_voltages(struct cgs_device *cgs_device, uint32_t mask,
518 const uint32_t *voltages) 518 const uint32_t *voltages)
519{ 519{
520 DRM_ERROR("not implemented"); 520 DRM_ERROR("not implemented");
@@ -565,7 +565,7 @@ static const struct amdgpu_irq_src_funcs cgs_irq_funcs = {
565 .process = cgs_process_irq, 565 .process = cgs_process_irq,
566}; 566};
567 567
568static int amdgpu_cgs_add_irq_source(void *cgs_device, unsigned src_id, 568static int amdgpu_cgs_add_irq_source(struct cgs_device *cgs_device, unsigned src_id,
569 unsigned num_types, 569 unsigned num_types,
570 cgs_irq_source_set_func_t set, 570 cgs_irq_source_set_func_t set,
571 cgs_irq_handler_func_t handler, 571 cgs_irq_handler_func_t handler,
@@ -600,19 +600,19 @@ static int amdgpu_cgs_add_irq_source(void *cgs_device, unsigned src_id,
600 return ret; 600 return ret;
601} 601}
602 602
603static int amdgpu_cgs_irq_get(void *cgs_device, unsigned src_id, unsigned type) 603static int amdgpu_cgs_irq_get(struct cgs_device *cgs_device, unsigned src_id, unsigned type)
604{ 604{
605 CGS_FUNC_ADEV; 605 CGS_FUNC_ADEV;
606 return amdgpu_irq_get(adev, adev->irq.sources[src_id], type); 606 return amdgpu_irq_get(adev, adev->irq.sources[src_id], type);
607} 607}
608 608
609static int amdgpu_cgs_irq_put(void *cgs_device, unsigned src_id, unsigned type) 609static int amdgpu_cgs_irq_put(struct cgs_device *cgs_device, unsigned src_id, unsigned type)
610{ 610{
611 CGS_FUNC_ADEV; 611 CGS_FUNC_ADEV;
612 return amdgpu_irq_put(adev, adev->irq.sources[src_id], type); 612 return amdgpu_irq_put(adev, adev->irq.sources[src_id], type);
613} 613}
614 614
615int amdgpu_cgs_set_clockgating_state(void *cgs_device, 615int amdgpu_cgs_set_clockgating_state(struct cgs_device *cgs_device,
616 enum amd_ip_block_type block_type, 616 enum amd_ip_block_type block_type,
617 enum amd_clockgating_state state) 617 enum amd_clockgating_state state)
618{ 618{
@@ -633,7 +633,7 @@ int amdgpu_cgs_set_clockgating_state(void *cgs_device,
633 return r; 633 return r;
634} 634}
635 635
636int amdgpu_cgs_set_powergating_state(void *cgs_device, 636int amdgpu_cgs_set_powergating_state(struct cgs_device *cgs_device,
637 enum amd_ip_block_type block_type, 637 enum amd_ip_block_type block_type,
638 enum amd_powergating_state state) 638 enum amd_powergating_state state)
639{ 639{
@@ -655,7 +655,7 @@ int amdgpu_cgs_set_powergating_state(void *cgs_device,
655} 655}
656 656
657 657
658static uint32_t fw_type_convert(void *cgs_device, uint32_t fw_type) 658static uint32_t fw_type_convert(struct cgs_device *cgs_device, uint32_t fw_type)
659{ 659{
660 CGS_FUNC_ADEV; 660 CGS_FUNC_ADEV;
661 enum AMDGPU_UCODE_ID result = AMDGPU_UCODE_ID_MAXIMUM; 661 enum AMDGPU_UCODE_ID result = AMDGPU_UCODE_ID_MAXIMUM;
@@ -695,7 +695,7 @@ static uint32_t fw_type_convert(void *cgs_device, uint32_t fw_type)
695 return result; 695 return result;
696} 696}
697 697
698static int amdgpu_cgs_get_firmware_info(void *cgs_device, 698static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
699 enum cgs_ucode_id type, 699 enum cgs_ucode_id type,
700 struct cgs_firmware_info *info) 700 struct cgs_firmware_info *info)
701{ 701{
@@ -774,7 +774,7 @@ static int amdgpu_cgs_get_firmware_info(void *cgs_device,
774 return 0; 774 return 0;
775} 775}
776 776
777static int amdgpu_cgs_query_system_info(void *cgs_device, 777static int amdgpu_cgs_query_system_info(struct cgs_device *cgs_device,
778 struct cgs_system_info *sys_info) 778 struct cgs_system_info *sys_info)
779{ 779{
780 CGS_FUNC_ADEV; 780 CGS_FUNC_ADEV;
@@ -808,7 +808,7 @@ static int amdgpu_cgs_query_system_info(void *cgs_device,
808 return 0; 808 return 0;
809} 809}
810 810
811static int amdgpu_cgs_get_active_displays_info(void *cgs_device, 811static int amdgpu_cgs_get_active_displays_info(struct cgs_device *cgs_device,
812 struct cgs_display_info *info) 812 struct cgs_display_info *info)
813{ 813{
814 CGS_FUNC_ADEV; 814 CGS_FUNC_ADEV;
@@ -851,7 +851,7 @@ static int amdgpu_cgs_get_active_displays_info(void *cgs_device,
851} 851}
852 852
853 853
854static int amdgpu_cgs_notify_dpm_enabled(void *cgs_device, bool enabled) 854static int amdgpu_cgs_notify_dpm_enabled(struct cgs_device *cgs_device, bool enabled)
855{ 855{
856 CGS_FUNC_ADEV; 856 CGS_FUNC_ADEV;
857 857
@@ -867,7 +867,7 @@ static int amdgpu_cgs_notify_dpm_enabled(void *cgs_device, bool enabled)
867 */ 867 */
868 868
869#if defined(CONFIG_ACPI) 869#if defined(CONFIG_ACPI)
870static int amdgpu_cgs_acpi_eval_object(void *cgs_device, 870static int amdgpu_cgs_acpi_eval_object(struct cgs_device *cgs_device,
871 struct cgs_acpi_method_info *info) 871 struct cgs_acpi_method_info *info)
872{ 872{
873 CGS_FUNC_ADEV; 873 CGS_FUNC_ADEV;
@@ -1030,14 +1030,14 @@ error:
1030 return result; 1030 return result;
1031} 1031}
1032#else 1032#else
1033static int amdgpu_cgs_acpi_eval_object(void *cgs_device, 1033static int amdgpu_cgs_acpi_eval_object(struct cgs_device *cgs_device,
1034 struct cgs_acpi_method_info *info) 1034 struct cgs_acpi_method_info *info)
1035{ 1035{
1036 return -EIO; 1036 return -EIO;
1037} 1037}
1038#endif 1038#endif
1039 1039
1040int amdgpu_cgs_call_acpi_method(void *cgs_device, 1040int amdgpu_cgs_call_acpi_method(struct cgs_device *cgs_device,
1041 uint32_t acpi_method, 1041 uint32_t acpi_method,
1042 uint32_t acpi_function, 1042 uint32_t acpi_function,
1043 void *pinput, void *poutput, 1043 void *pinput, void *poutput,
@@ -1121,7 +1121,7 @@ static const struct cgs_os_ops amdgpu_cgs_os_ops = {
1121 amdgpu_cgs_irq_put 1121 amdgpu_cgs_irq_put
1122}; 1122};
1123 1123
1124void *amdgpu_cgs_create_device(struct amdgpu_device *adev) 1124struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev)
1125{ 1125{
1126 struct amdgpu_cgs_device *cgs_device = 1126 struct amdgpu_cgs_device *cgs_device =
1127 kmalloc(sizeof(*cgs_device), GFP_KERNEL); 1127 kmalloc(sizeof(*cgs_device), GFP_KERNEL);
@@ -1135,10 +1135,10 @@ void *amdgpu_cgs_create_device(struct amdgpu_device *adev)
1135 cgs_device->base.os_ops = &amdgpu_cgs_os_ops; 1135 cgs_device->base.os_ops = &amdgpu_cgs_os_ops;
1136 cgs_device->adev = adev; 1136 cgs_device->adev = adev;
1137 1137
1138 return cgs_device; 1138 return (struct cgs_device *)cgs_device;
1139} 1139}
1140 1140
1141void amdgpu_cgs_destroy_device(void *cgs_device) 1141void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device)
1142{ 1142{
1143 kfree(cgs_device); 1143 kfree(cgs_device);
1144} 1144}
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-27 10:46:46 -0400