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authorRex Zhu <Rex.Zhu@amd.com>2018-09-30 05:35:12 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-10-09 18:08:25 -0400
commit71195ba670bc6070b5db406c4fc12c69efb9f7e4 (patch)
treedb1b7f301b0e602db894b02f935bee8eb83d9981 /drivers/gpu/drm/amd/amdgpu/vi.c
parent9d5aa2ef3862197eb31e2df7c5d6b9b6dadcaf8a (diff)
drm/amdgpu: Change VI gfx/sdma/smu init sequence
initialize gfx/sdma before dpm features enabled. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vi.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vi.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 88b57a5e9489..07880d35e9de 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1596,16 +1596,18 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1596 amdgpu_device_ip_block_add(adev, &vi_common_ip_block); 1596 amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
1597 amdgpu_device_ip_block_add(adev, &gmc_v7_4_ip_block); 1597 amdgpu_device_ip_block_add(adev, &gmc_v7_4_ip_block);
1598 amdgpu_device_ip_block_add(adev, &iceland_ih_ip_block); 1598 amdgpu_device_ip_block_add(adev, &iceland_ih_ip_block);
1599 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1600 amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
1599 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); 1601 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
1600 if (adev->enable_virtual_display) 1602 if (adev->enable_virtual_display)
1601 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); 1603 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
1602 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1603 amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
1604 break; 1604 break;
1605 case CHIP_FIJI: 1605 case CHIP_FIJI:
1606 amdgpu_device_ip_block_add(adev, &vi_common_ip_block); 1606 amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
1607 amdgpu_device_ip_block_add(adev, &gmc_v8_5_ip_block); 1607 amdgpu_device_ip_block_add(adev, &gmc_v8_5_ip_block);
1608 amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); 1608 amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
1609 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1610 amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
1609 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); 1611 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
1610 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) 1612 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
1611 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); 1613 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1615,8 +1617,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1615#endif 1617#endif
1616 else 1618 else
1617 amdgpu_device_ip_block_add(adev, &dce_v10_1_ip_block); 1619 amdgpu_device_ip_block_add(adev, &dce_v10_1_ip_block);
1618 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1619 amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
1620 if (!amdgpu_sriov_vf(adev)) { 1620 if (!amdgpu_sriov_vf(adev)) {
1621 amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block); 1621 amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block);
1622 amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block); 1622 amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block);
@@ -1626,6 +1626,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1626 amdgpu_device_ip_block_add(adev, &vi_common_ip_block); 1626 amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
1627 amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); 1627 amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
1628 amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); 1628 amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
1629 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1630 amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
1629 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); 1631 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
1630 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) 1632 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
1631 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); 1633 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1635,8 +1637,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1635#endif 1637#endif
1636 else 1638 else
1637 amdgpu_device_ip_block_add(adev, &dce_v10_0_ip_block); 1639 amdgpu_device_ip_block_add(adev, &dce_v10_0_ip_block);
1638 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1639 amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
1640 if (!amdgpu_sriov_vf(adev)) { 1640 if (!amdgpu_sriov_vf(adev)) {
1641 amdgpu_device_ip_block_add(adev, &uvd_v5_0_ip_block); 1641 amdgpu_device_ip_block_add(adev, &uvd_v5_0_ip_block);
1642 amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block); 1642 amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block);
@@ -1649,6 +1649,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1649 amdgpu_device_ip_block_add(adev, &vi_common_ip_block); 1649 amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
1650 amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block); 1650 amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block);
1651 amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); 1651 amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
1652 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1653 amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
1652 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); 1654 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
1653 if (adev->enable_virtual_display) 1655 if (adev->enable_virtual_display)
1654 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); 1656 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1658,8 +1660,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1658#endif 1660#endif
1659 else 1661 else
1660 amdgpu_device_ip_block_add(adev, &dce_v11_2_ip_block); 1662 amdgpu_device_ip_block_add(adev, &dce_v11_2_ip_block);
1661 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1662 amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
1663 amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block); 1663 amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block);
1664 amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block); 1664 amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
1665 break; 1665 break;
@@ -1667,6 +1667,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1667 amdgpu_device_ip_block_add(adev, &vi_common_ip_block); 1667 amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
1668 amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); 1668 amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
1669 amdgpu_device_ip_block_add(adev, &cz_ih_ip_block); 1669 amdgpu_device_ip_block_add(adev, &cz_ih_ip_block);
1670 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1671 amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
1670 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); 1672 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
1671 if (adev->enable_virtual_display) 1673 if (adev->enable_virtual_display)
1672 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); 1674 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1676,8 +1678,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1676#endif 1678#endif
1677 else 1679 else
1678 amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block); 1680 amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block);
1679 amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
1680 amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
1681 amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block); 1681 amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block);
1682 amdgpu_device_ip_block_add(adev, &vce_v3_1_ip_block); 1682 amdgpu_device_ip_block_add(adev, &vce_v3_1_ip_block);
1683#if defined(CONFIG_DRM_AMD_ACP) 1683#if defined(CONFIG_DRM_AMD_ACP)
@@ -1688,6 +1688,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1688 amdgpu_device_ip_block_add(adev, &vi_common_ip_block); 1688 amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
1689 amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); 1689 amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
1690 amdgpu_device_ip_block_add(adev, &cz_ih_ip_block); 1690 amdgpu_device_ip_block_add(adev, &cz_ih_ip_block);
1691 amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block);
1692 amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
1691 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); 1693 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
1692 if (adev->enable_virtual_display) 1694 if (adev->enable_virtual_display)
1693 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); 1695 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1697,8 +1699,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
1697#endif 1699#endif
1698 else 1700 else
1699 amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block); 1701 amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block);
1700 amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block);
1701 amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
1702 amdgpu_device_ip_block_add(adev, &uvd_v6_2_ip_block); 1702 amdgpu_device_ip_block_add(adev, &uvd_v6_2_ip_block);
1703 amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block); 1703 amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
1704#if defined(CONFIG_DRM_AMD_ACP) 1704#if defined(CONFIG_DRM_AMD_ACP)