drm/amdgpu: cleanup HDP flush handling

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>

1 files changed, 3 insertions, 12 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index d3eda315e719..7c4abff5005d 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -269,8 +269,6 @@ static void sdma_v3_0_ring_set_wptr(struct amdgpu_ring *ring)
         }
 }
 
-static void sdma_v3_0_hdp_flush_ring_emit(struct amdgpu_ring *);
-
 /**
  * sdma_v3_0_ring_emit_ib - Schedule an IB on the DMA engine
  *
@@ -285,9 +283,6 @@ static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,
         u32 vmid = (ib->vm ? ib->vm->ids[ring->idx].id : 0) & 0xf;
         u32 next_rptr = ring->wptr + 5;
 
-        if (ib->flush_hdp_writefifo)
-                next_rptr += 6;
-
         while ((next_rptr & 7) != 2)
                 next_rptr++;
         next_rptr += 6;
@@ -299,11 +294,6 @@ static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,
         amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1));
         amdgpu_ring_write(ring, next_rptr);
 
-        /* flush HDP */
-        if (ib->flush_hdp_writefifo) {
-                sdma_v3_0_hdp_flush_ring_emit(ring);
-        }
-
         /* IB packet must end on a 8 DW boundary */
         while ((ring->wptr & 7) != 2)
                 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_NOP));
@@ -320,13 +310,13 @@ static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,
 }
 
 /**
- * sdma_v3_0_hdp_flush_ring_emit - emit an hdp flush on the DMA ring
+ * sdma_v3_0_ring_emit_hdp_flush - emit an hdp flush on the DMA ring
  *
  * @ring: amdgpu ring pointer
  *
  * Emit an hdp flush packet on the requested DMA ring.
  */
-static void sdma_v3_0_hdp_flush_ring_emit(struct amdgpu_ring *ring)
+static void sdma_v3_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
 {
         u32 ref_and_mask = 0;
 
@@ -1407,6 +1397,7 @@ static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = {
         .emit_fence = sdma_v3_0_ring_emit_fence,
         .emit_semaphore = sdma_v3_0_ring_emit_semaphore,
         .emit_vm_flush = sdma_v3_0_ring_emit_vm_flush,
+        .emit_hdp_flush = sdma_v3_0_ring_emit_hdp_flush,
         .test_ring = sdma_v3_0_ring_test_ring,
         .test_ib = sdma_v3_0_ring_test_ib,
         .is_lockup = sdma_v3_0_ring_is_lockup,