drm/amdgpu: SR-IOV data exchange between PF&VF

SR-IOV need to exchange some data between PF&VF through shared VRAM

PF will copy some necessary firmware and information to the shared
VRAM. It also requires some information from VF. PF will send a
key through mailbox2 to help guest calculate checksum so that it can
verify whether the data is correct.

So check the data on the specified offset of the shared VRAM, if the
checksum is right, read values from it and write some VF information
next to the data from PF.

Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
index 2812d88a8bdd..b4906d2f30d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
@@ -183,6 +183,12 @@ static int xgpu_ai_send_access_requests(struct amdgpu_device *adev,
                         pr_err("Doesn't get READY_TO_ACCESS_GPU from pf, give up\n");
                         return r;
                 }
+                /* Retrieve checksum from mailbox2 */
+                if (req == IDH_REQ_GPU_INIT_ACCESS) {
+                        adev->virt.fw_reserve.checksum_key =
+                                RREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0,
+                                        mmBIF_BX_PF0_MAILBOX_MSGBUF_RCV_DW2));
+                }
         }
 
         return 0;